Sun; Shin-Nan

Patent Applications and Registrations

Patent applications and USPTO patent grants for Sun; Shin-Nan.The latest application filed is for "clock-generator architecture for a programmable-logic-based system on a chip".

Company Profile

0.8.3

Sun; Shin-Nan - Fremont CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Clock-generator architecture for a programmable-logic-based system on a chip Grant 7,579,895 - Sun , et al. August 25, 2	2009-08-25
Parallel programmable antifuse field programmable gate array device (FPGA) and a method for programming and testing an antifuse FPGA Grant 7,549,138 - Sun , et al. June 16, 2	2009-06-16
Clock-generator architecture for a programmable-logic-based system on a chip Grant 7,501,872 - Sun , et al. March 10, 2	2009-03-10
Clock-generator Architecture For A Programmable-logic-based System On A Chip App 20080309393 - Sun; Shin-Nan ; et al.	2008-12-18
Clock-generator Architecture For A Programmable-logic-based System On A Chip App 20080030235 - Sun; Shin-Nan ; et al.	2008-02-07
Parallel Programmable Antifuse Field Programmable Gate Array Device (fpga) And A Method For Programming And Testing An Antifuse Fpga App 20080028354 - Sun; Shin-Nan ; et al.	2008-01-31
Clock-generator architecture for a programmable-logic-based system on a chip Grant 7,298,178 - Sun , et al. November 20, 2	2007-11-20
Parallel programmable antifuse field programmable gate array device (FPGA) and a method for programming and testing an antifuse FPGA Grant 7,269,814 - Sun , et al. September 11, 2	2007-09-11
Parallel programmable antifuse field programmable gate array device (FPGA) and a method for programming and testing an antifuse FPGA Grant 7,111,272 - Sun , et al. September 19, 2	2006-09-19
Clock-generator architecture for a programmable-logic-based system on a chip Grant 7,102,391 - Sun , et al. September 5, 2	2006-09-05
Parallel programmable antifuse field programmable gate array device (FPGA) and a method for programming and testing an antifuse FPGA Grant 6,885,218 - Sun , et al. April 26, 2	2005-04-26

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