Patent | Date |
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Semiconductor memory device including an SOI substrate App 20070257313 - Hidaka; Hideto ;   et al. | 2007-11-08 |
Semiconductor memory device including an SOI substrate Grant 7,242,060 - Hidaka , et al. July 10, 2 | 2007-07-10 |
Semiconductor memory device including an SOI substrate App 20070052028 - Hidaka; Hideto ;   et al. | 2007-03-08 |
Semiconductor memory device including an SOI substrate Grant 7,138,684 - Hidaka , et al. November 21, 2 | 2006-11-21 |
Semiconductor memory device including an SOI App 20060118849 - Hidaka; Hideto ;   et al. | 2006-06-08 |
Semiconductor memory device including an SOI substrate App 20050001254 - Hidaka, Hideto ;   et al. | 2005-01-06 |
Semiconductor device using an SOI substrate Grant 6,787,853 - Hidaka , et al. September 7, 2 | 2004-09-07 |
Semiconductor memory device including an SOI substrate Grant 6,768,662 - Hidaka , et al. July 27, 2 | 2004-07-27 |
Semiconductor device using an SOI substrate App 20040067614 - Hidaka, Hideto ;   et al. | 2004-04-08 |
Semiconductor memory device including an SOI substrate App 20030206472 - Hidaka, Hideto ;   et al. | 2003-11-06 |
Semiconductor memory device including an SOI App 20020101754 - Hidaka, Hideto ;   et al. | 2002-08-01 |
Semiconductor memory device including an SOI substrate Grant 6,385,159 - Hidaka , et al. May 7, 2 | 2002-05-07 |
Semiconductor memory device including memory cell transistors formed on SOI substrate and having fixed body regions Grant 6,384,445 - Hidaka , et al. May 7, 2 | 2002-05-07 |
Semiconductor Device Using An Soi Substrate App 20020047157 - HIDAKA, HIDETO ;   et al. | 2002-04-25 |
Semiconductor memory device including an SOI substrate App 20010014047 - Hidaka, Hideto ;   et al. | 2001-08-16 |
Semiconductor memory device including an SOI substrate Grant 6,091,647 - Hidaka , et al. July 18, 2 | 2000-07-18 |
Semiconductor memory device including memory cell transistors formed on SOI substrate and having fixed body regions Grant 6,018,172 - Hidaka , et al. January 25, 2 | 2000-01-25 |
Column selecting circuit in semiconductor memory device Grant RE36,089 - Ooishi , et al. February 9, 1 | 1999-02-09 |
Semiconductor memory device including an SOI substrate Grant 5,825,696 - Hidaka , et al. October 20, 1 | 1998-10-20 |
Semiconductor memory device capable of simultaneously designating multibit test mode and special test mode Grant 5,793,685 - Suma August 11, 1 | 1998-08-11 |
Semiconductor memory device having a redundant row and a redundant column which can be accessed prior to substitution Grant 5,652,725 - Suma , et al. July 29, 1 | 1997-07-29 |
Semiconductor memory and semiconductor device having SOI structure Grant 5,635,744 - Hidaka , et al. June 3, 1 | 1997-06-03 |
Column selecting circuit in semiconductor memory device Grant 5,315,548 - Ooishi , et al. May 24, 1 | 1994-05-24 |