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name:-0.019240140914917
name:-0.044243812561035
name:-0.0066699981689453
Sullam; Bert Patent Filings

Sullam; Bert

Patent Applications and Registrations

Patent applications and USPTO patent grants for Sullam; Bert.The latest application filed is for "combined analog architecture and functionality in a mixed-signal array".

Company Profile
6.50.17
  • Sullam; Bert - Bellevue WA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Combined analog architecture and functionality in a mixed-signal array
Grant 11,105,851 - Kutz , et al. August 31, 2
2021-08-31
System level interconnect with programmable switching
Grant 10,826,499 - Sullam , et al. November 3, 2
2020-11-03
Combined Analog Architecture and Functionality in a Mixed-Signal Array
App 20200300910 - Kutz; Harold ;   et al.
2020-09-24
System Level Interconnect With Programmable Switching
App 20200169259 - Sullam; Bert ;   et al.
2020-05-28
Combined analog architecture and functionality in a mixed-signal array
Grant 10,634,722 - Kutz , et al.
2020-04-28
Ultra-low Power Adaptively Reconfigurable System
App 20200083889 - Thiagarajan; Eashwar ;   et al.
2020-03-12
System level interconnect with programmable switching
Grant 10,516,397 - Sullam , et al. Dec
2019-12-24
System Level Interconnect With Programmable Switching
App 20190214995 - Sullam; Bert ;   et al.
2019-07-11
System level interconnect with programmable switching
Grant 10,097,185 - Sullam , et al. October 9, 2
2018-10-09
System Level Interconnect With Programmable Switching
App 20180191351 - Sullam; Bert ;   et al.
2018-07-05
Dynamically reconfigurable analog routing circuits and methods for system on a chip
Grant 9,612,987 - Sullam , et al. April 4, 2
2017-04-04
Dynamically configurable and re-configurable data path
Grant 9,564,902 - Synder , et al. February 7, 2
2017-02-07
Autonomous control in a programmable system
Grant 9,448,964 - Sullam , et al. September 20, 2
2016-09-20
System level interconnect with programmable switching
Grant 9,325,320 - Sullam , et al. April 26, 2
2016-04-26
Universal digital block interconnection and channel routing
Grant 9,018,979 - Snyder , et al. April 28, 2
2015-04-28
Programmable interrupt routing system
Grant 8,838,852 - Sullam , et al. September 16, 2
2014-09-16
Active liquid crystal display drivers and duty cycle operation
Grant 8,686,985 - Snyder , et al. April 1, 2
2014-04-01
On-chip calibration method
Grant 8,643,519 - Kutz , et al. February 4, 2
2014-02-04
Addressing scheme to allow flexible mapping of functions in a programmable logic array
Grant 8,639,850 - Sullam January 28, 2
2014-01-28
Universal Digital Block Interconnection And Channel Routing
App 20140013022 - Snyder; Warren ;   et al.
2014-01-09
Configurable reset pin for input/output port
Grant 8,601,254 - Kutz , et al. December 3, 2
2013-12-03
Built in system bus interface for random access to programmable logic registers
Grant 8,598,908 - Sullam , et al. December 3, 2
2013-12-03
Clock driven dynamic datapath chaining
Grant 8,516,025 - Synder , et al. August 20, 2
2013-08-20
Combined analog architecture and functionality in a mixed-signal array
Grant 8,487,655 - Kutz , et al. July 16, 2
2013-07-16
Universal digital block interconnection and channel routing
Grant 8,482,313 - Snyder , et al. July 9, 2
2013-07-09
System level interconnect with programmable switching
Grant 8,476,928 - Sullam , et al. July 2, 2
2013-07-02
Reconfigurable testing system and method
Grant 8,402,313 - Pleis , et al. March 19, 2
2013-03-19
Processor independent line driving and receiving system
Grant 8,250,249 - Kavaiya , et al. August 21, 2
2012-08-21
Programmable interrupt routing system
Grant 8,135,884 - Sullam , et al. March 13, 2
2012-03-13
On-chip calibration method
Grant 8,125,360 - Kutz , et al. February 28, 2
2012-02-28
Addressing scheme to allow flexible mapping of functions in a programmable logic array
Grant 8,112,551 - Sullam February 7, 2
2012-02-07
System level interconnect with programmable switching
Grant 8,026,739 - Sullam , et al. September 27, 2
2011-09-27
Dynamically Reconfigurable Analog Routing Circuits And Methods For System On A Chip
App 20110026519 - Sullam; Bert ;   et al.
2011-02-03
Addressing Scheme To Allow Flexible Mapping Of Functions In A Programmable Logic Array
App 20100287334 - Sullam; Bert
2010-11-11
Autonomous Control In A Programmable System
App 20100281145 - Sullam; Bert ;   et al.
2010-11-04
Universal digital block interconnection and channel routing
Grant 7,737,724 - Snyder , et al. June 15, 2
2010-06-15
Independent control of core system blocks for power optimization
Grant 7,555,664 - Sullam June 30, 2
2009-06-30
Configurable analog to digital converter
Grant 7,479,913 - Thiagarajan , et al. January 20, 2
2009-01-20
Clock Driven Dynamic Datapath Chaining
App 20080288755 - Synder; Warren ;   et al.
2008-11-20
Dynamically Configurable And Re-configurable Data Path
App 20080263334 - Synder; Warren ;   et al.
2008-10-23
Universal Digital Block With Integrated Arithmetic Logic Unit
App 20080263319 - Snyder; Warren ;   et al.
2008-10-23
Active Liquid Crystal Display Drivers And Duty Cycle Operation
App 20080259070 - Snyder; Warren ;   et al.
2008-10-23
High Speed Dual Port Memory Without Sense Amplifier
App 20080259698 - Ozbek; Onur ;   et al.
2008-10-23
Universal Digital Block Interconnection And Channel Routing
App 20080258759 - Snyder; Warren ;   et al.
2008-10-23
System Level Interconnect With Programmable Switching
App 20080258760 - Sullam; Bert ;   et al.
2008-10-23
Reconfigurable testing system and method
Grant 7,308,608 - Pleis , et al. December 11, 2
2007-12-11
Independent control of core system blocks for power optimization
App 20070180279 - Sullam; Bert
2007-08-02
Emulator chip/board architecture and interface
Grant 7,076,420 - Snyder , et al. July 11, 2
2006-07-11
Architecture for synchronizing and resetting clock signals supplied to multiple programmable analog blocks
Grant 7,023,257 - Sullam April 4, 2
2006-04-04
Method for synchronizing and resetting clock signals supplied to multiple programmable analog blocks
Grant 6,967,511 - Sullam November 22, 2
2005-11-22
Method and circuit for synchronizing a write operation between an on-chip microprocessor and an on-chip programmable analog device operating at different frequencies
Grant 6,950,954 - Sullam , et al. September 27, 2
2005-09-27
Method and circuit for allowing a microprocessor to change its operating frequency on-the-fly
Grant 6,859,884 - Sullam February 22, 2
2005-02-22
System and method of providing a programmable clock architecture for an advanced microcontroller
Grant 6,614,320 - Sullam , et al. September 2, 2
2003-09-02

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