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Patent applications and USPTO patent grants for Sugiyama; Itsumi.The latest application filed is for "latch circuit, scan test circuit and latch circuit control method".
Patent | Date |
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Latch Circuit, Scan Test Circuit And Latch Circuit Control Method App 20140298126 - Sugiyama; Itsumi | 2014-10-02 |
Scan Circuit Having First Scan Flip-flops And Second Scan Flip-flops App 20140289578 - Sugiyama; Itsumi | 2014-09-25 |
Integrated circuit power consumption calculating apparatus and processing method Grant 8,350,620 - Sugiyama , et al. January 8, 2 | 2013-01-08 |
Semiconductor circuit apparatus and delay difference calculation method Grant 8,305,149 - Sugiyama November 6, 2 | 2012-11-06 |
Integrated Circuit Power Consumption Calculating Apparatus And Processing Method App 20120249230 - SUGIYAMA; Itsumi ;   et al. | 2012-10-04 |
Power Consumption Calculation Method, Power Consumption Calculation Apparatus, And Non-transitory Computer-readble Medium Storing Power Consumption Calculation Program App 20120253712 - SUGIYAMA; Itsumi ;   et al. | 2012-10-04 |
Semiconductor Circuit Apparatus And Delay Difference Calculation Method App 20100079212 - SUGIYAMA; Itsumi | 2010-04-01 |
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