| Patent | Date |
|---|
Inter-layer insulator for electronic devices and apparatus for forming same
Grant 11,430,689 - Sugino , et al. August 30, 2 | 2022-08-30 |
Buried Trench Isolation in Integrated Circuits
App 20190198611 - Sugino; Rinji ; et al. | 2019-06-27 |
Self-aligned trench isolation in integrated circuits
Grant 10,256,137 - Lu , et al. | 2019-04-09 |
Inter-Layer Insulator for Electronic Devices and Apparatus for Forming Same
App 20190043751 - Sugino; Rinji ; et al. | 2019-02-07 |
Vertical Division Of Three-dimensional Memory Device
App 20180323208 - Sugino; Rinji ; et al. | 2018-11-08 |
Memory device with multi-layer channel and charge trapping layer
Grant 10,020,317 - Zhang , et al. July 10, 2 | 2018-07-10 |
Self-aligned Trench Isolation In Integrated Circuits
App 20180166323 - LU; Ching-Huang ; et al. | 2018-06-14 |
Self-aligned trench isolation in integrated circuits
Grant 9,831,114 - Lu , et al. November 28, 2 | 2017-11-28 |
Memory Device with Multi-Layer Channel and Charge Trapping Layer
App 20170263623 - Zhang; Renhua ; et al. | 2017-09-14 |
Vertical Division Of Three-dimensional Memory Device
App 20170062456 - Sugino; Rinji ; et al. | 2017-03-02 |
Distribution of gas over a semiconductor wafer in batch processing
Grant 9,493,874 - Sugino November 15, 2 | 2016-11-15 |
Self-aligned trench isolation in integrated circuits
Grant 9,437,470 - Lu , et al. September 6, 2 | 2016-09-06 |
Buried Trench Isolation in Integrated Circuits
App 20160211321 - Sugino; Rinji ; et al. | 2016-07-21 |
Buried trench isolation in integrated circuits
Grant 9,252,026 - Sugino , et al. February 2, 2 | 2016-02-02 |
Formation of gate sidewall structure
Grant 9,252,221 - Sugino , et al. February 2, 2 | 2016-02-02 |
Buried Trench Isolation in Integrated Circuits
App 20150262838 - Sugino; Rinji ; et al. | 2015-09-17 |
Formation of Gate Sidewall Structure
App 20150187891 - SUGINO; Rinji ; et al. | 2015-07-02 |
Self-aligned Trench Isolation In Integrated Circuits
App 20150097245 - LU; Ching-Huang ; et al. | 2015-04-09 |
Methods for fabricating memory cells having fin structures with semicircular top surfaces and rounded top corners and edges
Grant 8,987,092 - Kang , et al. March 24, 2 | 2015-03-24 |
Patterned dummy wafers loading in batch type CVD
Grant 8,809,206 - Sugino , et al. August 19, 2 | 2014-08-19 |
Memory cell system with multiple nitride layers
Grant 8,809,936 - Xue , et al. August 19, 2 | 2014-08-19 |
Inter-Layer Insulator for Electronic Devices and Apparatus for Forming Same
App 20140138790 - SUGINO; Rinji ; et al. | 2014-05-22 |
Distribution of Gas Over A Semiconductor Water in Batch Processing
App 20140134332 - SUGINO; Rinji | 2014-05-15 |
Method for forming a semiconductor layer with improved gap filling properties
Grant 8,647,969 - Sugino , et al. February 11, 2 | 2014-02-11 |
Memory Device Protection Layer
App 20130228851 - Sugino; Rinji ; et al. | 2013-09-05 |
Gate replacement with top oxide regrowth for the top oxide improvement
Grant 8,455,268 - Lee , et al. June 4, 2 | 2013-06-04 |
Memory device protection layer
Grant 8,415,734 - Sugino , et al. April 9, 2 | 2013-04-09 |
Patterned Dummy Wafers Loading In Batch Type Cvd
App 20120202355 - Sugino; Rinji ; et al. | 2012-08-09 |
Memory cell system with charge trap
Grant 8,143,661 - Fang , et al. March 27, 2 | 2012-03-27 |
Method for forming a semiconducting layer with improved gap filling properties
Grant 8,133,801 - Sugino , et al. March 13, 2 | 2012-03-13 |
3d Integrated Circuit System And Method
App 20110272775 - KIM; Eunha ; et al. | 2011-11-10 |
3-D integrated circuit system and method
Grant 7,998,846 - Kim , et al. August 16, 2 | 2011-08-16 |
3-d Integrated Circuit System And Method
App 20100065940 - KIM; Eunha ; et al. | 2010-03-18 |
Methods For Fabricating Memory Cells Having Fin Structures With Semicircular Top Surfaces And Rounded Top Corners And Edges
App 20090269916 - KANG; Inkuk ; et al. | 2009-10-29 |
Use Of Silicon-rich Nitride In A Flash Memory Device
App 20090261406 - SUH; Youseok ; et al. | 2009-10-22 |
Gate Replacement With Top Oxide Regrowth For The Top Oxide Improvement
App 20090061631 - Lee; Chungho ; et al. | 2009-03-05 |
Integrated Circuit System With Implant Oxide
App 20080142874 - Fang; Shenqing ; et al. | 2008-06-19 |
Memory Device Protection Layer
App 20080135913 - Sugino; Rinji ; et al. | 2008-06-12 |
Memory Cell System With Charge Trap
App 20080083946 - Fang; Shenqing ; et al. | 2008-04-10 |
Method for forming memory array bitlines comprising epitaxially grown silicon and related structure
Grant 7,354,826 - Orimoto , et al. April 8, 2 | 2008-04-08 |
Dual charge storage node with undercut gate oxide for deep sub-micron memory cell
App 20080061359 - Lee; Chungho ; et al. | 2008-03-13 |
Memory Cell System With Multiple Nitride Layers
App 20080023750 - Xue; Lei ; et al. | 2008-01-31 |
Semiconductor memory with data retention liner
Grant 7,297,592 - Ngo , et al. November 20, 2 | 2007-11-20 |
System and method for gate formation in a semiconductor device
Grant 7,220,643 - Wada , et al. May 22, 2 | 2007-05-22 |
Method of formation of gate stack spacer and charge storage materials having reduced hydrogen content in charge trapping dielectric flash memory device
Grant 7,163,860 - Kamal , et al. January 16, 2 | 2007-01-16 |
Memory cell with plasma-grown oxide spacer for reduced DIBL and Vss resistance and increased reliability
Grant 7,151,028 - Fang , et al. December 19, 2 | 2006-12-19 |
Memory with improved charge-trapping dielectric layer
Grant 7,074,677 - Halliyal , et al. July 11, 2 | 2006-07-11 |
ONO fabrication process for increasing oxygen content at bottom oxide-substrate interface in flash memory devices
Grant 7,033,957 - Shiraiwa , et al. April 25, 2 | 2006-04-25 |
Semiconductor component and method of manufacture
Grant 7,026,211 - Sugino , et al. April 11, 2 | 2006-04-11 |
Process for fabrication of spacer layer with reduced hydrogen content in semiconductor device
Grant 6,949,481 - Halliyal , et al. September 27, 2 | 2005-09-27 |
Method of manufacturing a semiconductor memory with deuterated materials
Grant 6,884,681 - Kamal , et al. April 26, 2 | 2005-04-26 |
Liner for semiconductor memories and manufacturing method therefor
Grant 6,803,265 - Ngo , et al. October 12, 2 | 2004-10-12 |
Structure and method for preventing UV radiation damage and increasing data retention in memory cells
Grant 6,765,254 - Hui , et al. July 20, 2 | 2004-07-20 |
Semiconductor memory with deuterated materials
Grant 6,670,241 - Kamal , et al. December 30, 2 | 2003-12-30 |
Dry cleaning process for cleaning a surface
Grant 5,725,677 - Sugino , et al. March 10, 1 | 1998-03-10 |
Micro-machining minute hollow using native oxide membrane
Grant 5,662,814 - Sugino September 2, 1 | 1997-09-02 |
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