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Leverage cycle stealing within optimization flows
Grant 10,970,447 - Hieter , et al. April 6, 2 | 2021-04-06 |
Automated region based optimization of chip manufacture
Grant 10,776,543 - Hamilton , et al. Sept | 2020-09-15 |
Cell placement in a circuit with shared inputs and outputs
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Boundary assertion-based power recovery in integrated circuit design
Grant 10,706,194 - Suess , et al. | 2020-07-07 |
Memory Element Graph-based Placement In Integrated Circuit Design
App 20200125779 - Kim; Myung-Chul ; et al. | 2020-04-23 |
Selection of corners and/or margins using statistical static timing analysis of an integrated circuit
Grant 10,606,970 - Foreman , et al. | 2020-03-31 |
Boundary Assertion-based Power Recovery In Integrated Circuit Design
App 20200089828 - Suess; Alexander J. ; et al. | 2020-03-19 |
Memory element graph-based placement in integrated circuit design
Grant 10,558,775 - Kim , et al. Feb | 2020-02-11 |
Leverage cycle stealing within optimization flows
Grant 10,552,562 - Hieter , et al. Fe | 2020-02-04 |
Leverage cycle stealing within optimization flows
Grant 10,540,465 - Hieter , et al. Ja | 2020-01-21 |
Cell Placement In A Circuit With Shared Inputs And Outputs
App 20200019665 - ANDERSON; BRENT A. ; et al. | 2020-01-16 |
Automated Region Based Optimization Of Chip Manufacture
App 20190392089 - Hamilton; Josiah ; et al. | 2019-12-26 |
Leverage Cycle Stealing Within Optimization Flows
App 20190286773 - Hieter; Nathaniel D. ; et al. | 2019-09-19 |
Leverage Cycle Stealing Within Optimization Flows
App 20190220561 - Hieter; Nathaniel D. ; et al. | 2019-07-18 |
Memory Element Graph-based Placement In Integrated Circuit Design
App 20190188352 - Kim; Myung-Chul ; et al. | 2019-06-20 |
Leverage cycle stealing within optimization flows
Grant 10,216,875 - Hieter , et al. Feb | 2019-02-26 |
Optimizing placement of circuit resources using a globally accessible placement memory
Grant 10,210,297 - Hathaway , et al. Feb | 2019-02-19 |
Leverage Cycle Stealing Within Optimization Flows
App 20180239844 - Hieter; Nathaniel D. ; et al. | 2018-08-23 |
Leverage Cycle Stealing Within Optimization Flows
App 20180239843 - Hieter; Nathaniel D. ; et al. | 2018-08-23 |
Leverage Cycle Stealing Within Optimization Flows
App 20180239845 - Hieter; Nathaniel D. ; et al. | 2018-08-23 |
Selection Of Corners And/or Margins Using Statistical Static Timing Analysis Of An Integrated Circuit
App 20180232476 - Foreman; Eric A. ; et al. | 2018-08-16 |
Selection of corners and/or margins using statistical static timing analysis of an integrated circuit
Grant 10,013,516 - Foreman , et al. July 3, 2 | 2018-07-03 |
Integration of functional analysis and common path pessimism removal in static timing analysis
Grant 9,922,149 - Elmendorf , et al. March 20, 2 | 2018-03-20 |
Parallel multi-threaded common path pessimism removal in multiple paths
Grant 9,785,737 - Hathaway , et al. October 10, 2 | 2017-10-10 |
Optimizing placement of circuit resources using a globally accessible placement memory
Grant 9,747,400 - Hathaway , et al. August 29, 2 | 2017-08-29 |
Optimizing placement of circuit resources using a globally accessible placement memory
Grant 9,703,914 - Hathaway , et al. July 11, 2 | 2017-07-11 |
Selection Of Corners And/or Margins Using Statistical Static Timing Analysis Of An Integrated Circuit
App 20170161415 - Foreman; Eric A. ; et al. | 2017-06-08 |
Integration Of Functional Analysis And Common Path Pessimism Removal In Static Timing Analysis
App 20170147739 - Elmendorf; Peter C. ; et al. | 2017-05-25 |
Parallel Multi-threaded Common Path Pessimism Removal In Multiple Paths
App 20170140089 - Hathaway; David J. ; et al. | 2017-05-18 |
Variable accuracy parameter modeling in statistical timing
Grant 9,646,122 - Foreman , et al. May 9, 2 | 2017-05-09 |
Managing virtual boundaries to enable lock-free concurrent region optimization of an integrated circuit
Grant 9,639,654 - Chen , et al. May 2, 2 | 2017-05-02 |
Optimizing Placement Of Circuit Resources Using A Globally Accessible Placement Memory
App 20170083642 - Hathaway; David J. ; et al. | 2017-03-23 |
Optimizing Placement Of Circuit Resources Using A Globally Accessible Placement Memory
App 20170083641 - Hathaway; David J. ; et al. | 2017-03-23 |
Variable Accuracy Parameter Modeling In Statistical Timing
App 20160364513 - Foreman; Eric A. ; et al. | 2016-12-15 |
Selection of corners and/or margins using statistical static timing analysis of an integrated circuit
Grant 9,501,609 - Foreman , et al. November 22, 2 | 2016-11-22 |
Variable accuracy parameter modeling in statistical timing
Grant 9,483,604 - Foreman , et al. November 1, 2 | 2016-11-01 |
Optimizing Placement Of Circuit Resources Using A Globally Accessible Placement Memory
App 20160300006 - Hathaway; David J. ; et al. | 2016-10-13 |
Optimizing Placement Of Circuit Resources Using A Globally Accessible Placement Memory
App 20160283633 - Hathaway; David J. ; et al. | 2016-09-29 |
Optimizing placement of circuit resources using a globally accessible placement memory
Grant 9,436,791 - Hathaway , et al. September 6, 2 | 2016-09-06 |
Integration of functional analysis and common path pessimism removal in static timing analysis
Grant 9,418,201 - Elmendorf , et al. August 16, 2 | 2016-08-16 |
Optimizing placement of circuit resources using a globally accessible placement memory
Grant 9,418,188 - Hathaway , et al. August 16, 2 | 2016-08-16 |
Managing Virtual Boundaries To Enable Lock-free Concurrent Region Optimization Of An Integrated Circuit
App 20160171147 - CHEN; BIJIAN ; et al. | 2016-06-16 |
Method of improving timing critical cells for physical design in the presence of local placement congestion
Grant 9,075,948 - Kazda , et al. July 7, 2 | 2015-07-07 |
Method of Improving Timing Critical Cells For Physical Design In The Presence Of Local Placement Congestion
App 20150040095 - Kazda; Michael A. ; et al. | 2015-02-05 |
Native threshold voltage switching
Grant 8,495,553 - Antony , et al. July 23, 2 | 2013-07-23 |
Native Threshold Voltage Switching
App 20130152028 - Antony; George ; et al. | 2013-06-13 |
Method for enabling multiple incompatible or costly timing environment for efficient timing closure
Grant 8,302,049 - Musante , et al. October 30, 2 | 2012-10-30 |
Method for Enabling Multiple Incompatible or Costly Timing Environments for Efficient Timing Closure
App 20120144357 - Musante; Frank J. ; et al. | 2012-06-07 |
Method for generating a skew schedule for a clock distribution network containing gating elements
Grant 7,937,604 - Banerji , et al. May 3, 2 | 2011-05-03 |
Process and apparatus for estimating circuit delay
Grant 7,650,246 - Beatty, III , et al. January 19, 2 | 2010-01-19 |
Method For Generating A Skew Schedule For A Clock Distribution Network Containing Gating Elements
App 20080263488 - Banerji; Revanta ; et al. | 2008-10-23 |
Method for fast incremental calculation of an impact of coupled noise on timing
Grant 7,398,491 - Schaeffer , et al. July 8, 2 | 2008-07-08 |
Method For A Fast Incremental Calculation Of The Impact Of Coupled Noise On Timing
App 20070277131 - Schaeffer; Gregory M. ; et al. | 2007-11-29 |
Process And Apparatus For Estimating Circuit Delay
App 20070050160 - Beatty; Harry J. III ; et al. | 2007-03-01 |
System and method for correlated process pessimism removal for static timing analysis
Grant 7,117,466 - Kalafala , et al. October 3, 2 | 2006-10-03 |
System and method for correlated process pessimism removal for static timing analysis
App 20050066297 - Kalafala, Kerim ; et al. | 2005-03-24 |
Method for handling coupling effects in static timing analysis
Grant 6,615,395 - Hathaway , et al. September 2, 2 | 2003-09-02 |
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