loadpatents
name:-0.026039123535156
name:-0.026648998260498
name:-0.0004889965057373
Suaya; Roberto Patent Filings

Suaya; Roberto

Patent Applications and Registrations

Patent applications and USPTO patent grants for Suaya; Roberto.The latest application filed is for "high-frequency vlsi interconnect and intentional inductor impedance extraction in the presence of a multi-layer conductive substrate".

Company Profile
0.28.19
  • Suaya; Roberto - Meylan FR
  • Suaya; Roberto - 38240 Meylan FR
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
High-frequency VLSI interconnect and intentional inductor impedance extraction in the presence of a multi-layer conductive substrate
Grant 9,230,054 - Suaya January 5, 2
2016-01-05
High-frequency Vlsi Interconnect And Intentional Inductor Impedance Extraction In The Presence Of A Multi-layer Conductive Substrate
App 20150161324 - Suaya; Roberto
2015-06-11
High-frequency VLSI interconnect and intentional inductor impedance extraction in the presence of a multi-layer conductive substrate
Grant 8,910,108 - Suaya December 9, 2
2014-12-09
Mutual inductance extraction using dipole approximations
Grant 8,826,204 - Suaya , et al. September 2, 2
2014-09-02
High-frequency Vlsi Interconnect And Intentional Inductor Impedance Extraction In The Presence Of A Multi-layer Conductive Substrate
App 20140223401 - Suaya; Roberto
2014-08-07
High-frequency VLSI interconnect and intentional inductor impedance extraction in the presence of a multi-layer conductive substrate
Grant 8,732,648 - Suaya May 20, 2
2014-05-20
Extracting high frequency impedance in a circuit design using an electronic design automation tool
Grant 8,667,446 - Suaya , et al. March 4, 2
2014-03-04
Determining mutual inductance between intentional inductors
Grant 8,650,522 - Suaya , et al. February 11, 2
2014-02-11
Mutual Inductance Extraction Using Dipole Approximations
App 20140033164 - Suaya; Roberto ;   et al.
2014-01-30
Mutual inductance extraction using dipole approximations
Grant 8,549,449 - Suaya , et al. October 1, 2
2013-10-01
Through-silicon via admittance extraction
Grant 8,504,962 - Kourkoulos , et al. August 6, 2
2013-08-06
Through silicon via impedance extraction
Grant 8,448,115 - Kourkoulos , et al. May 21, 2
2013-05-21
High-frequency Vlsi Interconnect And Intentional Inductor Impedance Extraction In The Presence Of A Multi-layer Conductive Substrate
App 20120254814 - Suaya; Roberto
2012-10-04
Determining Mutual Inductance Between Intentional Inductors
App 20120204139 - Suaya; Roberto ;   et al.
2012-08-09
Modeling the skin effect using efficient conduction mode techniques
Grant 8,225,266 - Suaya , et al. July 17, 2
2012-07-17
High-frequency VLSI interconnect and intentional inductor impedance extraction in the presence of a multi-layer conductive substrate
Grant 8,214,788 - Suaya July 3, 2
2012-07-03
Determining mutual inductance between intentional inductors
Grant 8,161,438 - Suaya , et al. April 17, 2
2012-04-17
Modeling The Skin Effect Using Efficient Conduction Mode Techniques
App 20120011485 - Suaya; Roberto ;   et al.
2012-01-12
Synthesis strategies based on the appropriate use of inductance effects
Grant 8,091,054 - Suaya , et al. January 3, 2
2012-01-03
Modeling the skin effect using efficient conduction mode techniques
Grant 8,024,692 - Suaya , et al. September 20, 2
2011-09-20
Extracting High Frequency Impedance In A Circuit Design Using An Electronic Design Automation Tool
App 20100251191 - Suaya; Roberto ;   et al.
2010-09-30
Extracting high frequency impedance in a circuit design using an electronic design automation tool
Grant 7,689,962 - Suaya , et al. March 30, 2
2010-03-30
High-frequency Vlsi Interconnect And Intentional Inductor Impedance Extraction In The Presence Of A Multi-layer Conductive Substrate
App 20090228847 - Suaya; Roberto
2009-09-10
Mutual Inductance extraction using dipole approximations
App 20090172613 - Suaya; Roberto ;   et al.
2009-07-02
Mutual inductance extraction using dipole approximations
Grant 7,496,871 - Suaya , et al. February 24, 2
2009-02-24
Synthesis Strategies Based On The Appropriate Use Of Inductance Effects
App 20090013300 - Suaya; Roberto ;   et al.
2009-01-08
Extracting high frequency impedance in a circuit design using broadband representations
Grant 7,454,300 - Suaya , et al. November 18, 2
2008-11-18
Modeling the skin effect using efficient conduction mode techniques
App 20080276207 - Suaya; Roberto ;   et al.
2008-11-06
Synthesis strategies based on the appropriate use of inductance effects
Grant 7,426,706 - Suaya , et al. September 16, 2
2008-09-16
Extracting high frequency impedance in a circuit design using broadband representations
App 20070225925 - Suaya; Roberto ;   et al.
2007-09-27
Extracting high frequency impedance in a circuit design using an electronic design automation tool
App 20070226659 - Suaya; Roberto ;   et al.
2007-09-27
Capacitance measurements for an integrated circuit
Grant 7,260,796 - Suaya , et al. August 21, 2
2007-08-21
Determining mutual inductance between intentional inductors
App 20060282492 - Suaya; Roberto ;   et al.
2006-12-14
Capacitance and transmission line measurements for an integrated circuit
Grant 7,099,808 - Suaya , et al. August 29, 2
2006-08-29
Synthesis strategies based on the appropriate use of inductance effects
App 20060143586 - Suaya; Roberto ;   et al.
2006-06-29
Synthesis strategies based on the appropriate use of inductance effects
Grant 7,013,442 - Suaya , et al. March 14, 2
2006-03-14
Capacitance measurements for an integrated circuit
App 20050268260 - Suaya, Roberto ;   et al.
2005-12-01
Capacitance measurements for an integrated circuit
Grant 6,934,669 - Suaya , et al. August 23, 2
2005-08-23
Mutual inductance extraction using dipole approximations
App 20050120316 - Suaya, Roberto ;   et al.
2005-06-02
Synthesis strategies based on the appropriate use of inductance effects
App 20030131334 - Suaya, Roberto ;   et al.
2003-07-10
Capacitance and transmission line measurements for an integrated circuit
App 20020116696 - Suaya, Roberto ;   et al.
2002-08-22

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