loadpatents
name:-0.043323993682861
name:-0.034421920776367
name:-0.012568950653076
Su; Yi-Nien Patent Filings

Su; Yi-Nien

Patent Applications and Registrations

Patent applications and USPTO patent grants for Su; Yi-Nien.The latest application filed is for "air spacer surrounding conductive features and method forming same".

Company Profile
13.31.40
  • Su; Yi-Nien - Hsinchu TW
  • SU; YI-NIEN - HSINCHU CITY TW
  • Su; Yi-Nien - Kaohsiung TW
  • Su; Yi-Nien - Hsin-Chu TW
  • SU; Yi-Nien - Kaohsiung City TW
  • Su; Yi-Nien - Koohsiung TW
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Air Spacer Surrounding Conductive Features and Method Forming Same
App 20220310441 - Su; Yi-Nien ;   et al.
2022-09-29
Integrated circuit and method for manufacturing the same
Grant 11,456,210 - Huang , et al. September 27, 2
2022-09-27
Method Of Forming A Semiconductor Device
App 20220262674 - Su; Yi-Nien ;   et al.
2022-08-18
Method for manufacturing semiconductor structure
Grant 11,355,642 - Hsu , et al. June 7, 2
2022-06-07
Method of forming a semiconductor device
Grant 11,322,393 - Su , et al. May 3, 2
2022-05-03
Integrated Circuit And Method For Manufacturing The Same
App 20220115266 - HUANG; KUAN-WEI ;   et al.
2022-04-14
Patterning Material Including Silicon-containing Layer And Method For Semiconductor Device Fabrication
App 20220102150 - TUNG; Szu-Ping ;   et al.
2022-03-31
Self-Aligned Via Formation Using Spacers
App 20220102212 - Su; Yi-Nien ;   et al.
2022-03-31
Patterning Material Including Carbon-containing Layer And Method For Semiconductor Device Fabrication
App 20220102200 - TUNG; Szu-Ping ;   et al.
2022-03-31
Method For Reducing Line End Spacing And Semicondcutor Devices Manufactured Thereof
App 20220102198 - SU; YI-NIEN ;   et al.
2022-03-31
Middle-Of-Line Interconnect Structure Having Air Gap And Method Of Fabrication Thereof
App 20220102192 - Su; Yi-Nien ;   et al.
2022-03-31
Lithography Method To Reduce Spacing Between Interconnect Wires In Interconnect Structure
App 20220093455 - Su; Yi-Nien ;   et al.
2022-03-24
Method of Forming a Semiconductor Device
App 20210134657 - Su; Yi-Nien ;   et al.
2021-05-06
Method Of Manufacturing Semiconductor Devices
App 20210096473 - LIU; Ru-Gun ;   et al.
2021-04-01
Method of forming a semiconductor device
Grant 10,867,840 - Su , et al. December 15, 2
2020-12-15
Patterning method for semiconductor device and structures resulting therefrom
Grant 10,867,804 - Su December 15, 2
2020-12-15
Semiconductor methods and devices
Grant 10,840,097 - Su November 17, 2
2020-11-17
Method of Forming a Semiconductor Device
App 20200105585 - Su; Yi-Nien ;   et al.
2020-04-02
Method For Manufacturing Semiconductor Structure
App 20200052122 - HSU; Ju-Wang ;   et al.
2020-02-13
Patterning Method For Semiconductor Device And Structures Resulting Therefrom
App 20200006082 - Su; Yi-Nien
2020-01-02
Fin field effect transistor and method of forming the same
Grant 10,483,397 - Hsu , et al. Nov
2019-11-19
Semiconductor Methods And Devices
App 20190237333 - Su; Yi-Nien
2019-08-01
Semiconductor methods and devices
Grant 10,276,381 - Su
2019-04-30
Method for forming semiconductor structure
Grant 10,109,522 - Su , et al. October 23, 2
2018-10-23
Semiconductor Methods And Devices
App 20180151363 - Su; Yi-Nien
2018-05-31
Semiconductor methods and devices
Grant 9,881,794 - Su January 30, 2
2018-01-30
Semiconductor devices and methods of manufacture thereof
Grant 9,530,728 - Sung , et al. December 27, 2
2016-12-27
Method For Forming Semiconductor Structure
App 20160358816 - Su; Yi-Nien ;   et al.
2016-12-08
Method for forming semiconductor structure
Grant 9,425,091 - Su , et al. August 23, 2
2016-08-23
Interconnect structure and method of forming the same
Grant 9,355,894 - Sung , et al. May 31, 2
2016-05-31
Semiconductor Devices and Methods of Manufacture Thereof
App 20150380352 - Sung; Su-Jen ;   et al.
2015-12-31
Method For Forming Semiconductor Structure
App 20150318206 - Su; Yi-Nien ;   et al.
2015-11-05
Semiconductor devices and methods of manufacture thereof
Grant 9,129,965 - Sung , et al. September 8, 2
2015-09-08
Interconnect Structure and Method of Forming the Same
App 20150235894 - Sung; Su-Jen ;   et al.
2015-08-20
Damascene gap structure
Grant 9,082,770 - Su , et al. July 14, 2
2015-07-14
Interconnect structure and method of forming the same
Grant 9,041,216 - Sung , et al. May 26, 2
2015-05-26
Fin Field Effect Transistor And Method Of Forming The Same
App 20150137265 - HSU; Ju-Wang ;   et al.
2015-05-21
Fin field effect transistor and method of forming the same
Grant 8,927,353 - Hsu , et al. January 6, 2
2015-01-06
Semiconductor Devices and Methods of Manufacture Thereof
App 20140264895 - Sung; Su-Jen ;   et al.
2014-09-18
Interconnect Structure And Method Of Forming The Same
App 20140264880 - Sung; Su-Jen ;   et al.
2014-09-18
Deposition Injection Masking
App 20140272135 - Chang; Chih-Chiang ;   et al.
2014-09-18
Damascene Gap Structure
App 20140110845 - Su; Yi-Nien ;   et al.
2014-04-24
Dual damascene interconnect in hybrid dielectric
Grant 8,415,799 - Su , et al. April 9, 2
2013-04-09
Contact hole structures and contact structures and fabrication methods thereof
Grant 7,875,547 - Hsu , et al. January 25, 2
2011-01-25
Method for photoresist stripping and treatment of low-k dielectric material
Grant 7,598,176 - Tsai , et al. October 6, 2
2009-10-06
Fin Filled Effect Transistor And Method Of Forming The Same
App 20080277745 - Hsu; Ju-Wang ;   et al.
2008-11-13
Via structures and trench structures and dual damascene structures
Grant 7,436,009 - Huang , et al. October 14, 2
2008-10-14
Measuring low dielectric constant film properties during processing
Grant 7,400,401 - Tsai , et al. July 15, 2
2008-07-15
Via structures and trench structures and dual damascene structures
App 20070184669 - Huang; Yi-Chen ;   et al.
2007-08-09
Via hole and trench structures and fabrication methods thereof and dual damascene structures and fabrication methods thereof
Grant 7,217,663 - Huang , et al. May 15, 2
2007-05-15
Method of making dual damascene with via etch through
Grant 7,196,002 - Su , et al. March 27, 2
2007-03-27
Via in semiconductor device
App 20070035026 - Su; Yi-Nien ;   et al.
2007-02-15
Dual damascene interconnect in hybrid dielectric
App 20070001306 - Su; Yi-Nien ;   et al.
2007-01-04
Air gap interconnect structure and method thereof
App 20060264027 - Su; Yi-Nien ;   et al.
2006-11-23
Measuring low dielectric constant film properties during processing
App 20060220653 - Tsai; Jang-Shiang ;   et al.
2006-10-05
Air gap interconnect structure and method thereof
Grant 7,094,689 - Su , et al. August 22, 2
2006-08-22
Via hole and trench structures and fabrication methods thereof and dual damascene structures and fabrication methods thereof
App 20060160362 - Huang; Yi-Chen ;   et al.
2006-07-20
Contact hole structures and contact structures and fabrication methods thereof
App 20060154478 - Hsu; Ju-Wang ;   et al.
2006-07-13
Forming a dual damascene structure without ashing-damaged ultra-low-k intermetal dielectric
App 20060115981 - Shieh; Jyu-Horng ;   et al.
2006-06-01
Low oxygen content photoresist stripping process for low dielectric constant materials
Grant 7,029,992 - Shieh , et al. April 18, 2
2006-04-18
Method for photoresist stripping and treatment of low-k dielectric material
App 20060063386 - Tsai; Jang-Shiang ;   et al.
2006-03-23
Dual damascene structure formed of low-k dielectric materials
Grant 7,015,133 - Su , et al. March 21, 2
2006-03-21
Low Oxygen Content Photoresist Stripping Process For Low Dielectric Constant Materials
App 20060040474 - Shieh; Jyu-Horng ;   et al.
2006-02-23
Method of making dual damascene with via etch through
App 20060030159 - Su; Yi-Nien ;   et al.
2006-02-09
Air gap interconnect structure and method thereof
App 20060019482 - Su; Yi-Nien ;   et al.
2006-01-26
Dual Damascene Structure Formed Of Low-k Dielectric Materials
App 20050233572 - Su, Yi-Nien ;   et al.
2005-10-20
Method for improved plasma etching control
Grant 6,828,251 - Su , et al. December 7, 2
2004-12-07
Dry-wet-dry solvent-free process after stop layer etch in dual damascene process
Grant 6,797,627 - Shih , et al. September 28, 2
2004-09-28
Method for improved plasma etching control
App 20030155329 - Su, Yi-Nien ;   et al.
2003-08-21

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