loadpatents
name:-0.044855117797852
name:-0.039148092269897
name:-0.010630130767822
Su; Ke-Ying Patent Filings

Su; Ke-Ying

Patent Applications and Registrations

Patent applications and USPTO patent grants for Su; Ke-Ying.The latest application filed is for "systems and methods for capacitance extraction".

Company Profile
10.44.42
  • Su; Ke-Ying - Hsinchu TW
  • SU; Ke-Ying - Taipei City TW
  • Su; Ke-Ying - Taipei TW
  • Su; Ke-Ying - Hsin-Chu N/A TW
  • Su; Ke-Ying - Hsin-Chu City TW
  • Su; Ke-Ying - Hsinchu City TW
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Integrated circuit layout generation method and system
Grant 11,392,749 - Su , et al. July 19, 2
2022-07-19
Systems And Methods For Capacitance Extraction
App 20220147678 - LEE; Kuo Fu ;   et al.
2022-05-12
Method Of Manufacturing Semiconductor Device And System For Same
App 20220012401 - SU; Ke-Ying ;   et al.
2022-01-13
Integrated Circuit Layout Generation Method And System
App 20210073454 - SU; Ke-Ying ;   et al.
2021-03-11
RC tool accuracy time reduction
Grant 10,922,464 - Wu , et al. February 16, 2
2021-02-16
Integrated Circuit Layout Generation Method And System
App 20210019467 - SU; Ke-Ying ;   et al.
2021-01-21
Integrated circuit modeling methods and systems
Grant 10,846,456 - Su , et al. November 24, 2
2020-11-24
Integrated circuit layout generation method and system
Grant 10,796,059 - Su , et al. October 6, 2
2020-10-06
RC Tool Accuracy Time Reduction
App 20200110913 - Wu; Hui-I ;   et al.
2020-04-09
RC tool accuracy time reduction
Grant 10,515,172 - Wu , et al. Dec
2019-12-24
Integrated Circuit Modeling Methods And Systems
App 20190340328 - SU; Ke-Ying ;   et al.
2019-11-07
Integrated Circuit Layout Generation Method And System
App 20190294750 - SU; Ke-Ying ;   et al.
2019-09-26
RC Tool Accuracy Time Reduction
App 20190121928 - Wu; Hui-I ;   et al.
2019-04-25
Method, device and computer program product for integrated circuit layout generation
Grant 10,140,407 - Ho , et al. Nov
2018-11-27
Method of generating modified layout and system therefor
Grant 10,019,548 - Ho , et al. July 10, 2
2018-07-10
Method for analyzing interconnect process variation
Grant 9,904,743 - Liu , et al. February 27, 2
2018-02-27
Mask design based on sensitivities to changes in pattern spacing
Grant 9,846,761 - Chou , et al. December 19, 2
2017-12-19
Method Of Generating Modified Layout And System Therefor
App 20170316142 - HO; Chia-Ming ;   et al.
2017-11-02
Method of generating modified layout for RC extraction
Grant 9,710,588 - Ho , et al. July 18, 2
2017-07-18
Method For Analyzing Interconnect Process Variation
App 20170122998 - Liu; Te-Yu ;   et al.
2017-05-04
Method of designing circuit layout and system for implementing the same
Grant 9,558,314 - Liu , et al. January 31, 2
2017-01-31
Mask Design Based On Sensitivities To Changes In Pattern Spacing
App 20170004252 - CHOU; Chih-Cheng ;   et al.
2017-01-05
Method and apparatus for capacitance extraction
Grant 9,471,738 - Chou , et al. October 18, 2
2016-10-18
Mask shift resistance-inductance method for multiple patterning mask design and a method for performing the same
Grant 9,448,467 - Chou , et al. September 20, 2
2016-09-20
Method And Apparatus For Capacitance Extraction
App 20160232270 - CHOU; Chih-Cheng ;   et al.
2016-08-11
Method Of Designing Circuit Layout And System For Implementing The Same
App 20160180008 - LIU; Te-Yu ;   et al.
2016-06-23
RC corner solutions for double patterning technology
Grant 9,361,423 - Su , et al. June 7, 2
2016-06-07
Method, Device And Computer Program Product For Integrated Circuit Layout Generation
App 20160147928 - HO; Chia-Ming ;   et al.
2016-05-26
Method Of Generating Modified Layout For Rc Extraction
App 20160042108 - HO; Chia-Ming ;   et al.
2016-02-11
Method of generating a simulation model of a predefined fabrication process
Grant 9,230,052 - Ho , et al. January 5, 2
2016-01-05
Mask Shift Resistance-inductance Method For Multiple Patterning Mask Design And A Method For Performing The Same
App 20150234975 - CHOU; Chih-Cheng ;   et al.
2015-08-20
Methods and apparatus for RC extraction
Grant 9,081,933 - Liu , et al. July 14, 2
2015-07-14
Systems and methods for tuning technology files
Grant 9,003,345 - Wu , et al. April 7, 2
2015-04-07
Method Of Generating A Simulation Model Of A Predefined Fabrication Process
App 20150052493 - HO; Chia-Ming ;   et al.
2015-02-19
Multi-patterning mask decomposition method and system
Grant 8,954,900 - Ho , et al. February 10, 2
2015-02-10
Multi-patterning Mask Decomposition Method And System
App 20150040077 - HO; Chia-Ming ;   et al.
2015-02-05
RC extraction for multiple patterning layout design
Grant 8,904,314 - Ho , et al. December 2, 2
2014-12-02
Method of generating a bias-adjusted layout design of a conductive feature and method of generating a simulation model of a predefined fabrication process
Grant 8,887,106 - Ho , et al. November 11, 2
2014-11-11
Flexible pattern-oriented 3D profile for advanced process nodes
Grant 8,887,116 - Ho , et al. November 11, 2
2014-11-11
Methods and Apparatus for RC Extraction
App 20140310675 - Liu; Te-Yu ;   et al.
2014-10-16
RC Corner Solutions for Double Patterning Technology
App 20140304670 - Su; Ke-Ying ;   et al.
2014-10-09
Systems And Methods For Tuning Technology Files
App 20140282342 - WU; Meng-Fan ;   et al.
2014-09-18
Flexible Pattern-oriented 3d Profile For Advanced Process Nodes
App 20140282341 - Ho; Chia-Ming ;   et al.
2014-09-18
Parasitic Capacitance Extraction for FinFETs
App 20140258962 - Ho; Chia-Ming ;   et al.
2014-09-11
Parasitic capacitance extraction for FinFETs
Grant 8,826,213 - Ho , et al. September 2, 2
2014-09-02
Methods and apparatus for RC extraction
Grant 8,793,640 - Liu , et al. July 29, 2
2014-07-29
RC corner solutions for double patterning technology
Grant 8,751,975 - Su , et al. June 10, 2
2014-06-10
Systems and methods for creating frequency-dependent netlist
Grant 8,745,559 - Chou , et al. June 3, 2
2014-06-03
Method and system for photomask assignment for double patterning technology
Grant 8,732,628 - Wu , et al. May 20, 2
2014-05-20
Rc Extraction Methodology For Floating Silicon Substrate With Tsv
App 20140082578 - Wu; Ze-Ming ;   et al.
2014-03-20
Method of generating RC technology file
Grant 8,671,382 - Su , et al. March 11, 2
2014-03-11
RC extraction methodology for floating silicon substrate with TSV
Grant 8,607,179 - Wu , et al. December 10, 2
2013-12-10
Systems And Methods For Creating Frequency-dependent Netlist
App 20130305196 - CHOU; Chih-Cheng ;   et al.
2013-11-14
Accurate parasitic capacitance extraction for ultra large scale integrated circuits
Grant 8,572,537 - Su , et al. October 29, 2
2013-10-29
RC Corner Solutions for Double Patterning Technology
App 20130275927 - Su; Ke-Ying ;   et al.
2013-10-17
Method of Generating RC Technology File
App 20130227514 - Su; Ke-Ying ;   et al.
2013-08-29
Systems and methods for creating frequency-dependent RC extraction netlist
Grant 8,495,532 - Su , et al. July 23, 2
2013-07-23
Method Of Generating A Bias-adjusted Layout Design Of A Conductive Feature And Method Of Generating A Simulation Model Of A Predefined Fabrication Process
App 20130174112 - HO; Chia-Ming ;   et al.
2013-07-04
RC Extraction Methodology for Floating Silicon Substrate with TSV
App 20130139121 - Wu; Ze-Ming ;   et al.
2013-05-30
Systems and methods for creating frequency-dependent netlist
Grant 8,453,095 - Su , et al. May 28, 2
2013-05-28
Method of generating RC technology file
Grant 8,418,112 - Su , et al. April 9, 2
2013-04-09
Systems And Methods For Creating Frequency-dependent Netlist
App 20130014070 - SU; Ke-Ying ;   et al.
2013-01-10
IC design flow enhancement with CMP simulation
Grant 8,336,002 - Chang , et al. December 18, 2
2012-12-18
Accurate Parasitic Capacitance Extraction for Ultra Large Scale Integrated Circuits
App 20120260225 - Su; Ke-Ying ;   et al.
2012-10-11
Systems And Methods For Creating Frequency-dependent Rc Extraction Netlist
App 20120254811 - SU; Ke-Ying ;   et al.
2012-10-04
Method of Generating RC Technology File
App 20120226479 - Su; Ke-Ying ;   et al.
2012-09-06
Mask-shift-aware RC extraction for double patterning design
Grant 8,252,489 - Su , et al. August 28, 2
2012-08-28
Accurate parasitic capacitance extraction for ultra large scale integrated circuits
Grant 8,214,784 - Su , et al. July 3, 2
2012-07-03
Mask-shift-aware Rc Extraction For Double Patterning Design
App 20120052422 - Lu; Lee-Chung ;   et al.
2012-03-01
Mask-Shift-Aware RC Extraction for Double Patterning Design
App 20120054696 - Su; Ke-Ying ;   et al.
2012-03-01
Mask-shift-aware RC extraction for double patterning design
Grant 8,119,310 - Lu , et al. February 21, 2
2012-02-21
Accurate Parasitic Capacitance Extraction for Ultra Large Scale Integrated Circuits
App 20110023003 - Su; Ke-Ying ;   et al.
2011-01-27
Accurate parasitic capacitance extraction for ultra large scale integrated circuits
Grant 7,818,698 - Su , et al. October 19, 2
2010-10-19
Accurate Parasitic Capacitance Extraction for Ultra Large Scale Integrated Circuits
App 20090007035 - Su; Ke-Ying ;   et al.
2009-01-01
IC Design Flow Enhancement With CMP Simulation
App 20070266356 - Chang; Gwan Sin ;   et al.
2007-11-15
Metal Thickness Simulation for Improving RC Extraction Accuracy
App 20070266360 - Cheng; Yi-Kan ;   et al.
2007-11-15

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