Stuecheli; Jeffrey Adam

Patent Applications and Registrations

Patent applications and USPTO patent grants for Stuecheli; Jeffrey Adam.The latest application filed is for "store stream prefetching in a microprocessor".

Company Profile

0.27.28

Stuecheli; Jeffrey Adam - Austin TX

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method and system for specualtively sending processor-issued store operations to a store queue with full signal asserted Grant 8,352,712 - Bell, Jr. , et al. January 8, 2	2013-01-08
Data processing system and method for efficient coherency communication utilizing coherency domain indicators Grant 8,230,178 - Fields, Jr. , et al. July 24, 2	2012-07-24
Data processing system and method for efficient coherency communication utilizing coherency domains Grant 8,214,600 - Fields, Jr. , et al. July 3, 2	2012-07-03
System bus structure for large L2 cache array topology with different latency domains Grant 8,015,358 - Chung , et al. September 6, 2	2011-09-06
Variable store gather window Grant 7,840,758 - Bell, Jr. , et al. November 23, 2	2010-11-23
System bus structure for large L2 cache array topology with different latency domains Grant 7,793,048 - Chung , et al. September 7, 2	2010-09-07
Efficient coherency communication utilizing an IG coherency state Grant 7,783,841 - Fields, Jr. , et al. August 24, 2	2010-08-24
Efficient storage of metadata in a system memory Grant 7,779,292 - Fields, Jr. , et al. August 17, 2	2010-08-17
Data processing system and method for efficient coherency communication utilizing coherency domain indicators Grant 7,774,555 - Fields, Jr. , et al. August 10, 2	2010-08-10
Store stream prefetching in a microprocessor Grant 7,716,427 - Griswell, Jr. , et al. May 11, 2	2010-05-11
Cache member protection with partial make MRU allocation Grant 7,689,777 - Bell, Jr. , et al. March 30, 2	2010-03-30
Executing background writes to idle DIMMS Grant 7,600,091 - Brittain , et al. October 6, 2	2009-10-06
Data processing system and method for efficient communication utilizing an Ig coherency state Grant 7,584,329 - Fields, Jr. , et al. September 1, 2	2009-09-01
Variable store gather window Grant 7,568,076 - Bell, Jr. , et al. July 28, 2	2009-07-28
Processor and data processing system employing a variable store gather window Grant 7,543,120 - Bell, Jr. , et al. June 2, 2	2009-06-02
Programmable bank/timer address folding in memory devices Grant 7,516,264 - Brittain , et al. April 7, 2	2009-04-07
Store Stream Prefetching In A Microprocessor App 20090070556 - Griswell, JR.; John Barry ; et al.	2009-03-12
System Bus Structure For Large L2 Cache Array Topology With Different Latency Domains App 20090006758 - Chung; Vicente Enrique ; et al.	2009-01-01
System Bus Structure For Large L2 Cache Array Topology With Different Latency Domains App 20090006759 - Chung; Vicente Enrique ; et al.	2009-01-01
System bus structure for large L2 cache array topology with different latency domains Grant 7,469,318 - Chung , et al. December 23, 2	2008-12-23
Data processing system and method for efficient storage of metadata in a system memory Grant 7,467,323 - Fields, Jr. , et al. December 16, 2	2008-12-16
Pipelining D States For Mru Steerage During Mru-lru Member Allocation App 20080244187 - BELL; ROBERT H. ; et al.	2008-10-02
Processor, Method, And Data Processing System Employing A Variable Store Gather Window App 20080235459 - Bell; Robert H. ; et al.	2008-09-25
Cache Member Protection With Partial Make Mru Allocation App 20080177953 - BELL; ROBERT H. ; et al.	2008-07-24
Pipelining D states for MRU steerage during MRU/LRU member allocation Grant 7,401,189 - Bell, Jr. , et al. July 15, 2	2008-07-15
Store stream prefetching in a microprocessor Grant 7,380,066 - Griswell, Jr. , et al. May 27, 2	2008-05-27
Executing background writes to idle DIMMs Grant 7,373,471 - Brittain , et al. May 13, 2	2008-05-13
Processor, method, and data processing system employing a variable store gather window Grant 7,366,851 - Bell, Jr. , et al. April 29, 2	2008-04-29
Cache member protection with partial make MRU allocation Grant 7,363,433 - Bell, Jr. , et al. April 22, 2	2008-04-22
Executing Background Writes To Idle Dimms App 20080091905 - Brittain; Mark Andrew ; et al.	2008-04-17
Processor, Method, And Data Processing System Employing A Variable Store Gather Window App 20080086605 - BELL; ROBERT H. JR. ; et al.	2008-04-10
Data Processing System And Method For Efficient Communication Utilizing An Ig Coherency State App 20080052471 - FIELDS, JR.; JAMES STEPHEN ; et al.	2008-02-28
Data Processing System And Method For Efficient Storage Of Metadata In A System Memory App 20080028156 - Fields; James Stephen JR. ; et al.	2008-01-31
Data Processing System And Method For Efficient Coherency Communication Utilizing Coherency Domain Indicators App 20080028155 - FIELDS; JAMES STEPHEN JR. ; et al.	2008-01-31
Processor, Method, And Data Processing System Employing A Variable Store Gather Window App 20070277026 - BELL; ROBERT H. JR. ; et al.	2007-11-29
Cache allocation mechanism for biasing subsequent allocations based upon cache directory state Grant 7,103,721 - Cargnoni , et al. September 5, 2	2006-09-05
Pipelining D states for MRU steerage during MRU/LRU member allocation App 20060179232 - Bell; Robert H. JR. ; et al.	2006-08-10
Data processing system and method for efficient communication utilizing an Ig coherency state App 20060179247 - Fields; James Stephen JR. ; et al.	2006-08-10
Store stream prefetching in a microprocessor App 20060179238 - Griswell; John Barry JR. ; et al.	2006-08-10
Data processing system and method for efficient coherency communication utilizing coherency domain indicators App 20060179246 - Fields; James Stephen JR. ; et al.	2006-08-10
Data processing system and method for efficient coherency communication utilizing coherency domains App 20060179243 - Fields; James Stephen JR. ; et al.	2006-08-10
Single burst completion of multiple writes at buffered DIMMs App 20060179183 - Brittain; Mark Andrew ; et al.	2006-08-10
Programmable bank/timer address folding in memory devices App 20060179206 - Brittain; Mark Andrew ; et al.	2006-08-10
Executing background writes to idle DIMMs App 20060179213 - Brittain; Mark Andrew ; et al.	2006-08-10
Data processing system and method for efficient storage of metadata in a system memory App 20060179248 - Fields; James Stephen JR. ; et al.	2006-08-10
Cache member protection with partial make MRU allocation App 20060179234 - Bell; Robert H. JR. ; et al.	2006-08-10
Adaptive memory access speculation Grant 7,058,767 - Dodson , et al. June 6, 2	2006-06-06
Processor, method, and data processing system employing a variable store gather window App 20060095691 - Bell; Robert H. JR. ; et al.	2006-05-04
Pseudo random test pattern generation using Markov chains Grant 6,965,852 - Stuecheli November 15, 2	2005-11-15
Method and system for specualtively sending processor-issued store operations to a store queue with full signal asserted App 20050251660 - Bell, Robert H. JR. ; et al.	2005-11-10
Pseudo random test pattern generation using Markov chains App 20050108605 - Stuecheli, Jeffrey Adam	2005-05-19
Cache allocation mechanism for biasing subsequent allocations based upon cache directory state App 20040215890 - Cargnoni, Robert Alan ; et al.	2004-10-28
Adaptive memory access speculation App 20040215891 - Dodson, John Steven ; et al.	2004-10-28
Reducing resource collisions associated with memory units in a multi-level hierarchy memory system Grant 6,493,814 - Fields, Jr. , et al. December 10, 2	2002-12-10
Reducing resource collisions associated with memory units in a multi-level hierarchy memory system App 20020129220 - Fields, James Stephen JR. ; et al.	2002-09-12

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