Stroomer; Jeffrey D.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Stroomer; Jeffrey D..The latest application filed is for "managing web services using a reverse proxy".

Company Profile

0.43.3

Stroomer; Jeffrey D. - Lafayette CO

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Managing web services using a reverse proxy Grant 9,288,252 - Stroomer , et al. March 15, 2	2016-03-15
Mosaic generation from user-created content Grant 9,141,255 - Stroomer , et al. September 22, 2	2015-09-22
Managing Web Services Using A Reverse Proxy App 20140280473 - Stroomer; Jeffrey D. ; et al.	2014-09-18
Determining outlier pixels of successive frames Grant 8,774,544 - Szedo , et al. July 8, 2	2014-07-08
Enabling a high-level modeling system Grant 8,356,266 - Ou , et al. January 15, 2	2013-01-15
Using a software repository to increase the speed of software testing Grant 8,219,977 - Stroomer July 10, 2	2012-07-10
Mosaic Generation From User-created Content App 20120159348 - Stroomer; Jeffrey D. ; et al.	2012-06-21
Clock frequency exploration for circuit designs having multiple clock domains Grant 8,020,127 - Chan , et al. September 13, 2	2011-09-13
Method of simulating bidirectional signals in a modeling system Grant 7,934,185 - Ballagh , et al. April 26, 2	2011-04-26
Translation of a program in a dynamically-typed language to a program in a hardware description language Grant 7,895,584 - Ma , et al. February 22, 2	2011-02-22
Using XTables to communicate in a high level modeling system Grant 7,895,564 - Stroomer , et al. February 22, 2	2011-02-22
Using scripts for netlisting in a high-level modeling system Grant 7,797,677 - Ballagh , et al. September 14, 2	2010-09-14
Translation of high-level circuit design blocks into hardware description language Grant 7,685,541 - Stroomer , et al. March 23, 2	2010-03-23
Determination of data rate and data type in a high-level electronic design Grant 7,685,554 - Kelly , et al. March 23, 2	2010-03-23
Bypassing execution of a software test using a file cache Grant 7,673,288 - Stroomer March 2, 2	2010-03-02
Embedding an interpreter within an application written in a different programming language Grant 7,627,852 - Stroomer , et al. December 1, 2	2009-12-01
Shared memory interface in a programmable logic device using partial reconfiguration Grant 7,546,572 - Ballagh , et al. June 9, 2	2009-06-09
Component naming Grant 7,536,377 - Milne , et al. May 19, 2	2009-05-19
Correlation of data from design analysis tools with design blocks in a high-level modeling system Grant 7,493,578 - Milne , et al. February 17, 2	2009-02-17
Clock stabilization detection for hardware simulation Grant 7,478,030 - Ballagh , et al. January 13, 2	2009-01-13
Transformation of graphs representing an electronic design in a high modeling system Grant 7,444,603 - Kelly , et al. October 28, 2	2008-10-28
Hardware-based co-simulation on a PLD having an embedded processor Grant 7,437,280 - Ballagh , et al. October 14, 2	2008-10-14
Translation of high-level circuit design blocks into hardware description language Grant 7,386,814 - Stroomer , et al. June 10, 2	2008-06-10
Vector transfer during co-simulation Grant 7,376,544 - Dick , et al. May 20, 2	2008-05-20
Co-simulation interface Grant 7,366,651 - Milne , et al. April 29, 2	2008-04-29
Method of simulating bidirectional signals in a modeling system Grant 7,363,600 - Ballagh , et al. April 22, 2	2008-04-22
Hardware co-simulation breakpoints in a high-level modeling system Grant 7,346,481 - Ballagh , et al. March 18, 2	2008-03-18
Relocating blocks for netlist generation of an electronic system Grant 7,328,421 - Ballagh , et al. February 5, 2	2008-02-05
Communication between clock domains of an electronic circuit Grant 7,287,178 - Milne , et al. October 23, 2	2007-10-23
Method of and apparatus for specifying clock domains in electronic circuit designs Grant 7,269,811 - Ballagh , et al. September 11, 2	2007-09-11
Translation of an electronic integrated circuit design into hardware Grant 7,207,015 - Ballagh , et al. April 17, 2	2007-04-17
HDL co-simulation in a high-level modeling system Grant 7,203,632 - Milne , et al. April 10, 2	2007-04-10
Simulation of integrated circuitry within a high-level modeling system using hardware description language circuit descriptions Grant 7,194,705 - Deepak , et al. March 20, 2	2007-03-20
Method and system for annotating a computer program or hardware design Grant 7,123,970 - Stroomer October 17, 2	2006-10-17
Method and system for modeling and automatically generating an electronic design from a system level environment Grant 7,110,935 - Hwang , et al. September 19, 2	2006-09-19
Incremental netlisting Grant 7,086,030 - Stroomer , et al. August 1, 2	2006-08-01
Method and system for modeling and automatically generating an embedded system from a system-level environment Grant 7,085,702 - Hwang , et al. August 1, 2	2006-08-01
Compilation in a high-level modeling system Grant 7,082,594 - Milne , et al. July 25, 2	2006-07-25
Translation of an electronic integrated circuit design into hardware description language using circuit description template Grant 7,007,261 - Ballagh , et al. February 28, 2	2006-02-28
Specification of the hierarchy, connectivity, and graphical representation of a circuit design Grant 7,003,751 - Stroomer , et al. February 21, 2	2006-02-21
Method and apparatus for providing an interface to an electronic design of an integrated circuit Grant 6,907,584 - Milne , et al. June 14, 2	2005-06-14
Method and system for generating a circuit design including a peripheral component connected to a bus Grant 6,883,147 - Ballagh , et al. April 19, 2	2005-04-19
HDL Co-simulation in a high-level modeling system App 20040181385 - Milne, Roger B. ; et al.	2004-09-16