Strachan; Andy

Patent Applications and Registrations

Patent applications and USPTO patent grants for Strachan; Andy.The latest application filed is for "contact array optimization for esd devices".

Company Profile

0.26.3

Strachan; Andy - Santa Clara CA
Strachan; Andy - Sunnyvale CA
Strachan; Andy - Los Gatos CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Contact array optimization for ESD devices Grant 9,865,584 - Lin , et al. January 9, 2	2018-01-09
Contact Array Optimization For Esd Devices App 20180006013 - LIN; He ; et al.	2018-01-04
System and method for providing a poly cap and a no field oxide area to prevent formation of a vertical bird's beak structure in the manufacture of a semiconductor device Grant 7,989,883 - Dark , et al. August 2, 2	2011-08-02
Electrical test structure and method for characterization of deep trench sidewall reliability Grant 7,960,998 - Rozario , et al. June 14, 2	2011-06-14
System And Method For Increasing Breakdown Voltage Of Locos Isolated Devices App 20110065256 - Foote, JR.; Richard W. ; et al.	2011-03-17
System and method for increasing breakdown voltage of LOCOS isolated devices Grant 7,867,871 - Foote , et al. January 11, 2	2011-01-11
Method of controlling the breakdown voltage of BSCRs and BJT clamps Grant 7,714,355 - Vashchenko , et al. May 11, 2	2010-05-11
Electrical Test Structure And Method For Characterization Of Deep Trench Sidewall Reliability App 20090206865 - Rozario; Lisa V. ; et al.	2009-08-20
Method of forming a silicide bridged anti-fuse with a tungsten plug metalization process Grant 7,507,607 - Dark , et al. March 24, 2	2009-03-24
System and method for providing a poly cap and a no field oxide area to prevent formation of a vertical bird's beak structure in the manufacture of a semiconductor device Grant 7,488,647 - Dark , et al. February 10, 2	2009-02-10
Method of forming a circuit having subsurface conductors Grant 7,479,435 - Hopper , et al. January 20, 2	2009-01-20
Method of measuring the leakage current of a deep trench isolation structure Grant 7,298,159 - Rozario , et al. November 20, 2	2007-11-20
Method of forming a high-voltage silicon controlled rectifier structure with improved punch through resistance Grant 7,238,553 - Vashchenko , et al. July 3, 2	2007-07-03
Multi-source, multi-gate MOS transistor with a drain region that is wider than the source regions Grant 7,214,992 - Strachan , et al. May 8, 2	2007-05-08
Method of forming a semiconductor structure with non-uniform metal widths Grant 7,192,857 - Hopper , et al. March 20, 2	2007-03-20
Vertical photodiode with heavily-doped regions of alternating conductivity types Grant 7,105,373 - Hopper , et al. September 12, 2	2006-09-12
Single mask control of doping levels Grant 7,037,814 - Vashchenko , et al. May 2, 2	2006-05-02
Trim zener using double poly process Grant 6,979,879 - Yindeepol , et al. December 27, 2	2005-12-27
LDMOS transistor structure for improving hot carrier reliability Grant 6,946,706 - Brisbin , et al. September 20, 2	2005-09-20
Power transistor structure with non-uniform metal widths Grant 6,933,562 - Hopper , et al. August 23, 2	2005-08-23
High-voltage silicon controlled rectifier structure with improved punch through resistance Grant 6,919,588 - Vashchenko , et al. July 19, 2	2005-07-19
Semiconductor interconnect and method of providing interconnect using a contact region Grant 6,864,582 - Vashchenko , et al. March 8, 2	2005-03-08
Circuit and method of forming the circuit having subsurface conductors Grant 6,844,585 - Hopper , et al. January 18, 2	2005-01-18
Silicide bridged anti-fuse Grant 6,815,797 - Dark , et al. November 9, 2	2004-11-09
Memory cell with a capacitive structure as a control gate and method of forming the memory cell Grant 6,806,529 - Hopper , et al. October 19, 2	2004-10-19
Method and device for improving hot carrier reliability of an LDMOS transistor using drain ring over-drive bias Grant 6,727,547 - Brisbin , et al. April 27, 2	2004-04-27
Wedge-shaped high density capacitor and method of making the capacitor Grant 6,639,784 - Hopper , et al. October 28, 2	2003-10-28
Power MOSFET cell with a crossed bar shaped body contact area Grant 6,566,710 - Strachan , et al. May 20, 2	2003-05-20
Compact ballasting region design for snapback N-MOS ESD protection structure using multiple local N+ region blocking Grant 6,559,507 - Vashchenko , et al. May 6, 2	2003-05-06

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