Stoller; Herbert I.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Stoller; Herbert I..The latest application filed is for "method of manufacture of silicon based package and devices manufactured thereby".

Company Profile

0.21.8

Stoller; Herbert I. - Poughkeepsie NY
Stoller; Herbert I. - Wappingers Falls NY
Stoller; Herbert I. - Wappingers NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method and manufacture of silicon based package and devices manufactured thereby Grant 8,097,492 - Magerlein , et al. January 17, 2	2012-01-17
Silicon based package Grant 7,855,442 - Magerlein , et al. December 21, 2	2010-12-21
Method of manufacture of silicon based package and devices manufactured thereby App 20070111385 - Magerlein; John H. ; et al.	2007-05-17
Multiple power density chip structure Grant 7,193,318 - Colgan , et al. March 20, 2	2007-03-20
Method of manufacture of silicon based package and devices manufactured thereby Grant 7,189,595 - Magerlein , et al. March 13, 2	2007-03-13
Multiple Power Density Chip Structure App 20060038281 - Colgan; Evan G. ; et al.	2006-02-23
Jogging structure for wiring translation between grids with non-integral pitch ratios in chip carrier modules Grant 6,974,722 - Daves , et al. December 13, 2	2005-12-13
Method of manufacture of silicon based package Grant 6,878,608 - Brofman , et al. April 12, 2	2005-04-12
Method of manufacture of silicon based package and devices manufactured thereby App 20040229398 - Magerlein, John H. ; et al.	2004-11-18
Jogging Structure For Wiring Translation Between Grids With Non-integral Pitch Ratios In Chip Carrier Modules App 20040188823 - Daves, Glenn G. ; et al.	2004-09-30
Jogging structure for wiring translation between grids with non-integral pitch ratios in chip carrier modules Grant 6,762,489 - Daves , et al. July 13, 2	2004-07-13
Apparatus and method for repairing electronic packages Grant 6,713,686 - Becker , et al. March 30, 2	2004-03-30
Apparatus and method for repairing electronic packages App 20030136581 - Becker, Wiren D. ; et al.	2003-07-24
Structure and method for wiring translation between grids with non-integral pitch ratios in chip carrier modules App 20030094687 - Daves, Glenn G. ; et al.	2003-05-22
Method of manufacture of silicon based package and device manufactured thereby App 20020180013 - Brofman, Peter J. ; et al.	2002-12-05
High k dielectric material with low k dielectric sheathed signal vias Grant 6,430,030 - Farooq , et al. August 6, 2	2002-08-06
Semiconductor package containing multiple memory units Grant 6,392,896 - Stoller May 21, 2	2002-05-21
Method for making high k dielectric material with low k dielectric sheathed signal vias App 20010011571 - Farooq, Mukta S. ; et al.	2001-08-09
Direct deposit thin film single/multi chip module Grant 6,261,467 - Giri , et al. July 17, 2	2001-07-17
Method for a thin film multilayer capacitor Grant 6,216,324 - Farooq , et al. April 17, 2	2001-04-17
Method for making high k dielectric material with low k dielectric sheathed signal vias Grant 6,200,400 - Farooq , et al. March 13, 2	2001-03-13
High k dielectric capacitor with low k sheathed signal vias Grant 6,072,690 - Farooq , et al. June 6, 2	2000-06-06
Direct deposit thin film single/multi chip module Grant 6,037,044 - Giri , et al. March 14, 2	2000-03-14
Structure for a thin film multilayer capacitor Grant 6,023,407 - Farooq , et al. February 8, 2	2000-02-08
Internal resistor termination in multi-chip module environments Grant 5,635,761 - Cao , et al. June 3, 1	1997-06-03
Electronics system with direct write engineering change capability Grant 5,060,116 - Grobman , et al. October 22, 1	1991-10-22
Multilayered interposer board for powering high current chip modules Grant 4,688,151 - Kraus , et al. August 18, 1	1987-08-18
Engineering change facility on both major surfaces of chip module Grant 4,546,413 - Feinberg , et al. October 8, 1	1985-10-08
Selective epitaxy method for making filamentary pedestal transistor Grant 4,252,581 - Anantha , et al. February 24, 1	1981-02-24

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