| Patent | Date |
|---|
Ring network element and the ring network architectures it enables
Grant 8,228,958 - Stiles , et al. July 24, 2 | 2012-07-24 |
Onboard RAM based FIFO with pointers to buffer overhead bytes of synchronous payload envelopes in synchronous optical networks
Grant 7,277,447 - Wang , et al. October 2, 2 | 2007-10-02 |
Ring network element and the ring network architectures it enables
Grant 7,158,540 - Stiles , et al. January 2, 2 | 2007-01-02 |
Alignment of TDM-based signals for packet transmission using framed and unframed operations
Grant 6,959,008 - McClary , et al. October 25, 2 | 2005-10-25 |
Alignment of TDM-based signals for packet transmission using framed and unframed operations
App 20030016699 - McClary, Michael ; et al. | 2003-01-23 |
Method and apparatus for debugging an integrated circuit
Grant 6,499,123 - McFarland , et al. December 24, 2 | 2002-12-24 |
Onboard RAM based FIFO with pointes to buffer overhead bytes that point to SPE in sonet frames
App 20020141456 - Wang, James ; et al. | 2002-10-03 |
Branch prediction device with two levels of branch prediction cache
Grant 6,425,075 - Stiles , et al. July 23, 2 | 2002-07-23 |
Method and apparatus for executing string instructions
Grant 6,212,629 - McFarland , et al. April 3, 2 | 2001-04-03 |
Branch prediction device with two levels of branch prediction cache
Grant 6,067,616 - Stiles , et al. May 23, 2 | 2000-05-23 |
Set-associative cache memory utilizing a single bank of physical memory
Grant 5,905,997 - Stiles May 18, 1 | 1999-05-18 |
Semi-autonomous RISC pipelines for overlapped execution of RISC-like instructions within the multiple superscalar execution units of a processor having distributed pipeline control for speculative and out-of-order execution of complex instructions
Grant 5,781,753 - McFarland , et al. July 14, 1 | 1998-07-14 |
Semi-Autonomous RISC pipelines for overlapped execution of RISC-like instructions within the multiple superscalar execution units of a processor having distributed pipeline control for sepculative and out-of-order execution of complex instructions
Grant 5,768,575 - McFarland , et al. June 16, 1 | 1998-06-16 |
Cache memory system for dynamically altering single cache memory line as either branch target entry or prefetch instruction queue based upon instruction sequence
Grant 5,748,932 - Van Dyke , et al. May 5, 1 | 1998-05-05 |
Computer processor with distributed pipeline control that allows functional units to complete operations out of order while maintaining precise interrupts
Grant 5,682,492 - McFarland , et al. October 28, 1 | 1997-10-28 |
Method and apparatus for store-into-instruction-stream detection and maintaining branch prediction cache consistency
Grant 5,649,137 - Favor , et al. July 15, 1 | 1997-07-15 |
Two-level branch prediction cache
Grant 5,515,518 - Stiles , et al. May 7, 1 | 1996-05-07 |
Apparatus for superscalar instruction predecoding using cached instruction lengths
Grant 5,513,330 - Stiles April 30, 1 | 1996-04-30 |
Method an apparatus for store-into-instruction-stream detection and maintaining branch prediction cache consistency
Grant 5,511,175 - Favor , et al. April 23, 1 | 1996-04-23 |
Computer processor with distributed pipeline control that allows functional units to complete operations out of order while maintaining precise interrupts
Grant 5,442,757 - McFarland , et al. * August 15, 1 | 1995-08-15 |
Two-level branch prediction cache
Grant 5,327,547 - Stiles , et al. * July 5, 1 | 1994-07-05 |
Cache memory system for dynamically altering single cache memory line as either branch target entry or pre-fetch instruction queue based upon instruction sequence
Grant 5,230,068 - Van Dyke , et al. July 20, 1 | 1993-07-20 |
Method and apparatus for store-into-instruction-stream detection and maintaining branch prediction cache consistency
Grant 5,226,130 - Favor , et al. July 6, 1 | 1993-07-06 |
Processor having plurality of functional units for orderly retiring outstanding operations based upon its associated tags
Grant 5,226,126 - McFarland , et al. July 6, 1 | 1993-07-06 |
Two-level branch prediction cache
Grant 5,163,140 - Stiles , et al. November 10, 1 | 1992-11-10 |
Integrated single structure branch prediction cache
Grant 5,093,778 - Favor , et al. March 3, 1 | 1992-03-03 |
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