Stephens, Jr.; Michael C.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Stephens, Jr.; Michael C..The latest application filed is for "signal timing alignment based on a common data strobe in memory devices configured for stacked arrangements".

Company Profile

0.67.14

Stephens, Jr.; Michael C. - Los Gatos CA
Stephens, Jr.; Michael C. - San Jose CA
Stephens, Jr.; Michael C. - Beaverton OR
Stephens, Jr.; Michael C. - Stafford TX
Stephens, Jr.; Michael C. - Sugar Land TX

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Signal timing alignment based on a common data strobe in memory devices configured for stacked arrangements Grant 11,398,267 - Stephens, Jr. July 26, 2	2022-07-26
Signal Timing Alignment Based On A Common Data Strobe In Memory Devices Configured For Stacked Arrangements App 20210134348 - Stephens, JR.; Michael C.	2021-05-06
Signal timing alignment based on a common data strobe in memory devices configured for stacked arrangements Grant 10,923,176 - Stephens, Jr. February 16, 2	2021-02-16
Signal Timing Alignment based on a Common Data Strobe in Memory Devices Configured for Stacked Arrangements App 20200090730 - Stephens, JR.; Michael C.	2020-03-19
Signal timing alignment based on a common data strobe in memory devices configured for stacked arrangements Grant 10,497,425 - Stephens, Jr. De	2019-12-03
Signal timing alignment based on a common data strobe in memory devices configured for stacked arrangements Grant 10,199,087 - Stephens, Jr. Fe	2019-02-05
Dual-gate transistor control based on calibration circuitry Grant 9,906,218 - Stephens, Jr. February 27, 2	2018-02-27
Signal timing alignment based on a common data strobe in memory devices configured for stacked arrangements App 20180019012 - Stephens, JR.; Michael C.	2018-01-18
Signal timing alignment based on a common data strobe in memory devices configured for stacked arrangements App 20170337964 - Stephens, JR.; Michael C.	2017-11-23
Reference level adjustment for calibration of dual-gate transistors Grant 9,806,708 - Stephens, Jr. October 31, 2	2017-10-31
Signal timing alignment based on a common data strobe in memory devices configured for stacked arrangements Grant 9,659,628 - Stephens, Jr. May 23, 2	2017-05-23
Semiconductor device having dual-gate transistors and calibration circuitry Grant 9,601,167 - Stephens, Jr. March 21, 2	2017-03-21
Portable device emergency beacon Grant 9,510,176 - Stephens, Jr. November 29, 2	2016-11-29
Signal timing alignment based on a common data strobe in memory devices configured for stacked arrangements App 20160343425 - Stephens, JR.; Michael C.	2016-11-24
Semiconductor memory device having calibration circuitry for dual-gate transistors associated with a memory array Grant 9,455,001 - Stephens, Jr. September 27, 2	2016-09-27
Signal timing alignment based on a common data strobe in memory devices configured for stacked arrangements Grant 9,424,888 - Stephens, Jr. August 23, 2	2016-08-23
Dual-gate transistor control based on calibration circuitry Grant 9,344,080 - Stephens, Jr. May 17, 2	2016-05-17
Reference level adjustment for calibration of dual-gate transistors Grant 9,304,525 - Stephens, Jr. April 5, 2	2016-04-05
Semiconductor memory device having calibration circuitry for dual-gate transistors associated with a memory array Grant 9,286,955 - Stephens, Jr. March 15, 2	2016-03-15
Portable Device Emergency Beacon App 20160044482 - Stephens, JR.; Michael C.	2016-02-11
Stack position determination in memory devices configured for stacked arrangements Grant 9,218,854 - Stephens, Jr. December 22, 2	2015-12-22
Memory devices with serially connected signals for stacked arrangements Grant 9,183,891 - Stephens, Jr. November 10, 2	2015-11-10
Latency adjustment based on stack position identifier in memory devices configured for stacked arrangements Grant 9,153,298 - Stephens, Jr. October 6, 2	2015-10-06
Valid command detection based on stack position identifiers in memory devices configured for stacked arrangements Grant 9,153,299 - Stephens, Jr. October 6, 2	2015-10-06
Pad selection in memory devices configured for stacked arrangements Grant 9,058,855 - Stephens, Jr. June 16, 2	2015-06-16
Stack Position Determination In Memory Devices Configured For Stacked Arrangements App 20150138897 - Stephens, JR.; Michael C.	2015-05-21
Signal Timing Alignment Based On A Common Data Strobe In Memory Devices Configured For Stacked Arrangements App 20150109845 - Stephens, JR.; Michael C.	2015-04-23
Self-refresh adjustment in memory devices configured for stacked arrangements Grant 8,971,085 - Stephens, Jr. March 3, 2	2015-03-03
Valid Command Detection Based On Stack Position Identifiers In Memory Devices Configured For Stacked Arrangements App 20150009741 - Stephens, JR.; Michael C.	2015-01-08
Pad Selection In Memory Devices Configured For Stacked Arrangements App 20150009738 - Stephens, JR.; Michael C.	2015-01-08
Self-refresh Adjustment In Memory Devices Configured For Stacked Arrangements App 20150009737 - Stephens, JR.; Michael C.	2015-01-08
Latency Adjustment Based On Stack Position Identifier In Memory Devices Configured For Stacked Arrangements App 20150009740 - Stephens, JR.; Michael C.	2015-01-08
Memory Devices With Serially Connected Signals For Stacked Arrangements App 20150009739 - Stephens, JR.; Michael C.	2015-01-08
Signal timing alignment based on a common data strobe in memory devices configured for stacked arrangements Grant 8,897,053 - Stephens, Jr. November 25, 2	2014-11-25
Stack position determination in memory devices configured for stacked arrangements Grant 8,891,278 - Stephens, Jr. November 18, 2	2014-11-18
Internal supply redundancy across memory devices configured for stacked arrangements Grant 8,743,583 - Stephens, Jr. June 3, 2	2014-06-03
Serial searching in memory devices configured for stacked arrangements Grant 8,730,705 - Stephens, Jr. May 20, 2	2014-05-20
Supply adjustment in memory devices configured for stacked arrangements Grant 8,681,524 - Stephens, Jr. March 25, 2	2014-03-25
Valid command detection based on stack position identifiers in memory devices configured for stacked arrangements Grant 8,659,928 - Stephens, Jr. February 25, 2	2014-02-25
Internal supply testing in memory devices configured for stacked arrangements Grant 8,614,909 - Stephens, Jr. December 24, 2	2013-12-24
Memory devices with serially connected signals for stacked arrangements Grant 8,599,595 - Stephens, Jr. December 3, 2	2013-12-03
Supply adjustment in memory devices configured for stacked arrangements Grant 8,565,029 - Stephens, Jr. October 22, 2	2013-10-22
Pad selection in memory devices configured for stacked arrangements Grant 8,564,999 - Stephens, Jr. October 22, 2	2013-10-22
Self-refresh adjustment in memory devices configured for stacked arrangements Grant 8,559,258 - Stephens, Jr. October 15, 2	2013-10-15
Method and apparatus for restricted search operation in content addressable memory (CAM) devices Grant 7,117,300 - James , et al. October 3, 2	2006-10-03
Dynamically adjustable on-chip supply voltage generation Grant 7,102,421 - Ternullo, Jr. , et al. September 5, 2	2006-09-05
Compare circuit and method for content addressable memory (CAM) device Grant 6,988,164 - Wanzakhade , et al. January 17, 2	2006-01-17
Search engine device and method for generating output search responses from multiple input search responses Grant 6,954,823 - James , et al. October 11, 2	2005-10-11
Result compare circuit and method for content addressable memory (CAM) device Grant 6,845,024 - Wanzakhade , et al. January 18, 2	2005-01-18
Reticle option layer detection method Grant 6,764,867 - Stephens, Jr. , et al. July 20, 2	2004-07-20
Self-refresh test time reduction scheme Grant 6,246,619 - Ematrudo , et al. June 12, 2	2001-06-12
Internal charge pump voltage limit control Grant 6,208,197 - Ternullo, Jr. , et al. March 27, 2	2001-03-27
On-chip-generated supply voltage regulator with power-up mode Grant 6,060,873 - Ternullo, Jr. , et al. May 9, 2	2000-05-09
Multiple data clock activation with programmable delay for use in multiple CAS latency memory devices Grant 6,061,296 - Ternullo, Jr. , et al. May 9, 2	2000-05-09
Semiconductor memory device with improved read signal generation of data lines and assisted precharge to mid-level Grant 5,796,665 - Ternullo, Jr. , et al. August 18, 1	1998-08-18
Timing control circuit for synchronous static random access memory Grant 5,559,752 - Stephens, Jr. , et al. September 24, 1	1996-09-24
Synchronous self-timed clock pulse circuit having improved power-up performance Grant 5,517,137 - Stephens, Jr. May 14, 1	1996-05-14
Output buffer with boost from voltage supplies Grant 5,469,385 - Smith , et al. November 21, 1	1995-11-21
Method and apparatus for production testing of self-refresh operations and a particular application to synchronous memory devices Grant 5,450,364 - Stephens, Jr. , et al. September 12, 1	1995-09-12
Method and apparatus for preventing invalid operating modes and an application to synchronous memory devices Grant 5,386,385 - Stephens, Jr. January 31, 1	1995-01-31
Array block level redundancy with steering logic Grant 5,295,101 - Stephens, Jr. , et al. March 15, 1	1994-03-15

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