loadpatents
name:-0.018748998641968
name:-0.026630878448486
name:-0.060490846633911
Stephens; Jason E. Patent Filings

Stephens; Jason E.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Stephens; Jason E..The latest application filed is for "middle of the line self-aligned direct pattern contacts".

Company Profile
6.19.17
  • Stephens; Jason E. - Menands NY
  • Stephens; Jason E. - Hopewell Junction NY
  • Stephens; Jason E. - Albany NY
  • Stephens; Jason E. - Cohoes NY
  • Stephens; Jason E - Beacon NY
  • Stephens; Jason E. - Beacon NY US
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Middle of the line self-aligned direct pattern contacts
Grant 11,043,418 - Stephens , et al. June 22, 2
2021-06-22
Merge mandrel features
Grant 10,741,439 - Chen , et al. A
2020-08-11
Middle Of The Line Self-aligned Direct Pattern Contacts
App 20200083102 - STEPHENS; Jason E. ;   et al.
2020-03-12
Middle of the line self-aligned direct pattern contacts
Grant 10,522,403 - Stephens , et al. Dec
2019-12-31
Merge Mandrel Features
App 20190267281 - CHEN; Hsueh-Chung ;   et al.
2019-08-29
Merge Mandrel Features
App 20190221474 - CHEN; Hsueh-Chung ;   et al.
2019-07-18
Middle Of The Line Self-aligned Direct Pattern Contacts
App 20190214298 - STEPHENS; Jason E. ;   et al.
2019-07-11
Merge mandrel features
Grant 10,340,180 - Chen , et al.
2019-07-02
Methods Of Forming Conductive Lines And Vias And The Resulting Structures
App 20190139823 - Chen; Hsueh-Chung ;   et al.
2019-05-09
Transistor contacts self-aligned in two dimensions
Grant 10,056,373 - Wei , et al. August 21, 2
2018-08-21
Methods of forming a high-k contact liner to improve effective via separation distance and the resulting devices
Grant 9,825,031 - Bouche , et al. November 21, 2
2017-11-21
Transistor Contacts Self-aligned In Two Dimensions
App 20170221886 - Wei; Andy Chih-Hung ;   et al.
2017-08-03
Transistor contacts self-aligned two dimensions
Grant 9,660,040 - Wei , et al. May 23, 2
2017-05-23
Borderless contact formation through metal-recess dual cap integration
Grant 9,502,528 - Bouche , et al. November 22, 2
2016-11-22
Methods of cross-coupling line segments on a wafer
Grant 9,472,455 - Stephens , et al. October 18, 2
2016-10-18
Method for creating self-aligned transistor contacts
Grant 9,461,128 - Zaleski , et al. October 4, 2
2016-10-04
Forming merged lines in a metallization layer by replacing sacrificial lines with conductive lines
Grant 9,412,655 - Bouche , et al. August 9, 2
2016-08-09
Forming Merged Lines In A Metallization Layer By Replacing Sacrificial Lines With Conductive Lines
App 20160225666 - Bouche; Guillaume ;   et al.
2016-08-04
Method For Creating Self-aligned Transistor Contacts
App 20160093704 - Zaleski; Mark A. ;   et al.
2016-03-31
Borderless Contact Formation Through Metal-recess Dual Cap Integration
App 20160064514 - Bouche; Guillaume ;   et al.
2016-03-03
Transistor Contacts Self-aligned Two Dimensions
App 20160049481 - Wei; Andy Chih-Hung ;   et al.
2016-02-18
Method for creating self-aligned transistor contacts
Grant 9,236,437 - Zaleski , et al. January 12, 2
2016-01-12
Forming cross-coupled line segments
Grant 9,224,617 - Pritchard , et al. December 29, 2
2015-12-29
Transistor contacts self-aligned in two dimensions
Grant 9,202,751 - Wei , et al. December 1, 2
2015-12-01
Transistor Contacts Self-aligned In Two Dimensions
App 20150287636 - Wei; Andy Chih-Hung ;   et al.
2015-10-08
Methods Of Cross-coupling Line Segments On A Wafer
App 20150287604 - STEPHENS; Jason E. ;   et al.
2015-10-08
Method For Creating Self-aligned Transistor Contacts
App 20150236106 - Zaleski; Mark A. ;   et al.
2015-08-20
Forming Cross-coupled Line Segments
App 20150214064 - PRITCHARD; David ;   et al.
2015-07-30
Self-aligned double patterning via enclosure design
Grant 8,839,168 - Kye , et al. September 16, 2
2014-09-16
Via non-standard limiting parameters
Grant 8,793,627 - Stephens , et al. July 29, 2
2014-07-29
Self-aligned Double Patterning Via Enclosure Design
App 20140208285 - Kye; Jongwook ;   et al.
2014-07-24
Semiconductor device having contact layer providing electrical connections
Grant 8,598,633 - Tarabbia , et al. December 3, 2
2013-12-03
Semiconductor Device
App 20130181289 - Tarabbia; Marc ;   et al.
2013-07-18

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed