loadpatents
name:-0.014957904815674
name:-0.017998933792114
name:-0.0015928745269775
Steiner; Kurt G. Patent Filings

Steiner; Kurt G.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Steiner; Kurt G..The latest application filed is for "guided acoustic wave device".

Company Profile
1.15.12
  • Steiner; Kurt G. - Orlando FL
  • Steiner; Kurt G. - Foglesville PA
  • Steiner; Kurt G. - Fogelsville PA
  • Steiner; Kurt G. - Bethlehem PA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Acoustic filtering circuitry including capacitor
Grant 10,476,481 - Chen , et al. Nov
2019-11-12
Guided acoustic wave device
Grant 10,469,050 - Gamble , et al. No
2019-11-05
Surface acoustic wave filter with a cap layer for improved reliability
Grant 9,973,169 - Steiner , et al. May 15, 2
2018-05-15
Guided Acoustic Wave Device
App 20180054179 - Gamble; Kevin J. ;   et al.
2018-02-22
Acoustic Filtering Circuitry Including Capacitor
App 20180041193 - Chen; Alan S. ;   et al.
2018-02-08
Tcsaw With Improved Reliability
App 20170099042 - Steiner; Kurt G. ;   et al.
2017-04-06
Routing Under Bond Pad For The Replacement Of An Interconnect Layer
App 20130056868 - Archer, III; Vance D. ;   et al.
2013-03-07
Routing under bond pad for the replacement of an interconnect layer
Grant 8,319,343 - Archer, III , et al. November 27, 2
2012-11-27
Acoustic wave guide device and method for minimizing trimming effects and piston mode instabilities
Grant 8,294,331 - Abbott , et al. October 23, 2
2012-10-23
Acoustic Wave Guide Device and Method for Minimizing Trimming Effects and Piston Mode Instabilities
App 20120161577 - Abbott; Benjamin P. ;   et al.
2012-06-28
Bond pad support structure for semiconductor device
Grant 8,183,698 - Antol , et al. May 22, 2
2012-05-22
Method for separating a semiconductor wafer into individual semiconductor dies using an implanted impurity
Grant 8,119,501 - Harris , et al. February 21, 2
2012-02-21
Temperature compensated surface acoustic wave device and method having buried interdigital transducers for providing an improved insertion loss and quality factor
Grant 8,044,553 - Chen , et al. October 25, 2
2011-10-25
Temperature Compensated Surface Acoustic Wave Device and Method Having Buried Interdigital Transducers for Providing an Improved Insertion Loss and Quality Factor
App 20110204747 - Chen; Alan S. ;   et al.
2011-08-25
Method For Separating A Semiconductor Wafer Into Individual Semiconductor Dies Using An Implanted Impurity
App 20100221893 - Harris; Edward B. ;   et al.
2010-09-02
Bond Pad Support Structure For Semiconductor Device
App 20100201000 - Antol; Joze F. ;   et al.
2010-08-12
Routing Under Bond Pad For The Replacement Of An Interconnect Layer
App 20070063352 - Archer; Vance D. III ;   et al.
2007-03-22
Gate dielectric structure for reducing boron penetration and current leakage
Grant 7,081,419 - Chen , et al. July 25, 2
2006-07-25
Novel gate dielectric structure for reducing boron penetration and current leakage
App 20040238905 - Chen, Yuan ;   et al.
2004-12-02
Structure and method for isolating porous low-k dielectric films
Grant 6,798,043 - Steiner , et al. September 28, 2
2004-09-28
Structure and method for isolating porous low-k dielectric films
App 20030001273 - Steiner, Kurt G. ;   et al.
2003-01-02
Method of manufacturing an interconnect structure having a passivation layer for preventing subsequent processing reactions
Grant 6,432,814 - Steiner , et al. August 13, 2
2002-08-13
Method Of Manufacturing An Interconnect Structure Having A Passivation Layer For Preventing Subsequent Processing Reactions
App 20020064940 - Steiner, Kurt G. ;   et al.
2002-05-30
Hydrogenated silicon carbide as a liner for self-aligning contact vias
Grant 6,362,094 - Dabbaugh , et al. March 26, 2
2002-03-26
Semiconductor device having an anti-reflective layer and a method of manufacture thereof
Grant 6,133,618 - Steiner October 17, 2
2000-10-17
Method for using a hardmask to form an opening in a semiconductor substrate
Grant 6,008,123 - Kook , et al. December 28, 1
1999-12-28
Integrated circuit with planar dielectric layer
Grant 5,200,358 - Bollinger , et al. April 6, 1
1993-04-06

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