Stanley; Thomas Earl
Patent Applications and Registrations
Patent applications and USPTO patent grants for Stanley; Thomas Earl.The latest application filed is for "programmable multi-level track layout method and system for optimizing ecc redundancy in data storage devices".
- Stanley; Thomas Earl - Gilroy CA
| Patent | Date |
|---|---|
| Programmable multi-level track layout method and system for optimizing ECC redundancy in data storage devices Grant 6,651,213 - Hassner , et al. November 18, 2 | 2003-11-18 |
| Method and apparatus for monitoring track misregistration Grant 6,603,630 - Gong , et al. August 5, 2 | 2003-08-05 |
| Programmable multi-level track layout method and system for optimizing ECC redundancy in data storage devices App 20020178421 - Hassner, Martin Aureliano ; et al. | 2002-11-28 |
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