Stamm, Rebecca L.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Stamm, Rebecca L..The latest application filed is for "method and apparatus to quiesce a portion of a simultaneous multithreaded central processing unit".

Company Profile

0.12.2

Stamm, Rebecca L. - Palo Alto CA
Stamm; Rebecca L. - Boston MA
Stamm; Rebecca L. - Wellesley MA
Stamm; Rebecca L. - Newton MA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method and apparatus to quiesce a portion of a simultaneous multithreaded central processing unit App 20040073905 - Emer, Joel S. ; et al.	2004-04-15
Temporary halting of thread execution until monitoring of armed events to memory location identified in working registers Grant 6,675,192 - Emer , et al. January 6, 2	2004-01-06
Method and apparatus to quiesce a portion of a simultaneous multithreaded central processing unit App 20030105944 - Emer, Joel S. ; et al.	2003-06-05
Method and apparatus to quiesce a portion of a simultaneous multithreaded central processing unit Grant 6,493,741 - Emer , et al. December 10, 2	2002-12-10
Conversion of internal processor register commands to I/O space addresses Grant 5,481,689 - Stamm , et al. January 2, 1	1996-01-02
Method and apparatus for ordering read and write operations using conflict bits in a write queue Grant 5,432,918 - Stamm July 11, 1	1995-07-11
Pipeline utilizing an integral cache for transferring data to and from a register Grant 5,430,888 - Witek , et al. July 4, 1	1995-07-04
Processor and method for preventing access to a locked memory block by recording a lock in a content addressable memory with outstanding cache fills Grant 5,404,482 - Stamm , et al. April 4, 1	1995-04-04
Processor and method for delaying the processing of cache coherency transactions during outstanding cache fills Grant 5,404,483 - Stamm , et al. April 4, 1	1995-04-04
Ensuring write ordering under writeback cache error conditions Grant 5,347,648 - Stamm , et al. September 13, 1	1994-09-13
Processor system with writeback cache using writeback and non writeback transactions stored in separate queues Grant 5,317,720 - Stamm , et al. May 31, 1	1994-05-31
Error transition mode for multi-processor system Grant 5,155,843 - Stamm , et al. October 13, 1	1992-10-13
Pipeline having an integral cache which processes cache misses and loads data in parallel Grant 5,148,536 - Witek , et al. September 15, 1	1992-09-15
Method and apparatus for filtering invalidate requests Grant 5,058,006 - Durdan , et al. October 15, 1	1991-10-15

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