loadpatents
name:-0.010074853897095
name:-0.010579109191895
name:-0.00057792663574219
Stalter; Kathleen A. Patent Filings

Stalter; Kathleen A.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Stalter; Kathleen A..The latest application filed is for "dielectric interposer for chip to substrate soldering".

Company Profile
0.12.5
  • Stalter; Kathleen A. - Hopewell Junction NY
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Dielectric interposer for chip to substrate soldering
Grant 6,984,792 - Brofman , et al. January 10, 2
2006-01-10
Dielectric interposer for chip to substrate soldering
Grant 6,657,313 - Brofman , et al. December 2, 2
2003-12-02
Dielectric interposer for chip to substrate soldering
App 20030193093 - Brofman, Peter J. ;   et al.
2003-10-16
Method for assembling a carrier and a semiconductor device
Grant 6,584,684 - Brofman , et al. July 1, 2
2003-07-01
Method of interconnecting electronic components using a plurality of conductive studs
App 20010019178 - Brofman, Peter J. ;   et al.
2001-09-06
Method for enhancing fatigue life of ball grid arrays
Grant 6,283,359 - Brofman , et al. September 4, 2
2001-09-04
Process for forming cone shaped solder for chip interconnection
App 20010015495 - Brofman, Peter J. ;   et al.
2001-08-23
Solder disc connection
Grant 6,278,184 - Brofman , et al. August 21, 2
2001-08-21
Z-axis compressible polymer with fine metal matrix suspension
Grant 6,270,363 - Brofman , et al. August 7, 2
2001-08-07
Method for assembling a carrier and a semiconductor device
App 20010007288 - Brofman, Peter J. ;   et al.
2001-07-12
Method of interconnecting electronic components using a plurality of conductive studs
Grant 6,258,625 - Brofman , et al. July 10, 2
2001-07-10
Process and apparatus to remove closely spaced chips on a multi-chip module
App 20010006188 - DeLaurentis, Stephen A. ;   et al.
2001-07-05
Process and apparatus to remove closely spaced chips on a multi-chip module
Grant 6,216,937 - DeLaurentis , et al. April 17, 2
2001-04-17
Method for enhancing fatigue life of ball grid arrays
Grant 6,158,644 - Brofman , et al. December 12, 2
2000-12-12
Ceramic ball grid array using in-situ solder stretch
Grant 5,975,409 - Brofman , et al. November 2, 1
1999-11-02
Enhanced ceramic ball grid array using in-situ solder stretch with spring
Grant 5,968,670 - Brofman , et al. October 19, 1
1999-10-19
Enhanced ceramic ball grid array using in-situ solder stretch with clip
Grant 5,964,396 - Brofman , et al. October 12, 1
1999-10-12

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed