| Patent | Date |
|---|
Dynamically resizing minibatch in neural network execution
Grant 11,354,573 - Venkataramani , et al. June 7, 2 | 2022-06-07 |
Reduced precision based programmable and SIMD dataflow architecture
Grant 11,347,517 - Gopalakrishnan , et al. May 31, 2 | 2022-05-31 |
Bi-scaled deep neural networks
Grant 11,263,518 - Venkataramani , et al. March 1, 2 | 2022-03-01 |
Deep neural network performance analysis on shared memory accelerator systems
Grant 11,188,820 - Choi , et al. November 30, 2 | 2021-11-30 |
Loop management in multi-processor dataflow architecture
Grant 11,138,010 - Chen , et al. October 5, 2 | 2021-10-05 |
Hybrid Data-model Parallelism For Efficient Deep Learning
App 20210110247 - Venkataramani; Swagath ; et al. | 2021-04-15 |
Bi-scaled Deep Neural Networks
App 20210103799 - Venkataramani; Swagath ; et al. | 2021-04-08 |
Methods of cache preloading on a partition or a context switch
Grant 10,963,387 - Cain, III , et al. March 30, 2 | 2021-03-30 |
System-aware Selective Quantization For Performance Optimized Distributed Deep Learning
App 20210064954 - Choi; Jungwook ; et al. | 2021-03-04 |
Predicting cache misses using data access behavior and instruction address
Grant 10,936,319 - Srinivasan , et al. March 2, 2 | 2021-03-02 |
Reduced Precision Based Programmable And Simd Dataflow Architecture
App 20200401413 - GOPALAKRISHNAN; Kailash ; et al. | 2020-12-24 |
Programmable data delivery by load and store agents on a processing chip interfacing with on-chip memory components and directing data to external memory components
Grant 10,838,868 - Chen , et al. November 17, 2 | 2020-11-17 |
Reusing An Operand In An Instruction Set Architecture (isa)
App 20200356371 - FLEISCHER; Bruce ; et al. | 2020-11-12 |
Dynamically Resizing Minibatch In Neural Network Execution
App 20200311536 - Venkataramani; Swagath ; et al. | 2020-10-01 |
Programmable Data Delivery To A System Of Shared Processing Elements With Shared Memory
App 20200285579 - CHEN; Chia-Yu ; et al. | 2020-09-10 |
Matrix multiplication on a systolic array
Grant 10,769,238 - Chen , et al. Sep | 2020-09-08 |
Method to Map Convolutional Layers of Deep Neural Network on a Plurality of Processing Elements with SIMD Execution Units, Priva
App 20200134105 - CHEN; Chia-Yu ; et al. | 2020-04-30 |
Processor and memory transparent convolutional lowering and auto zero padding for deep neural network implementations
Grant 10,565,285 - Choi , et al. Feb | 2020-02-18 |
Matrix Multiplication On A Systolic Array
App 20200012706 - Chen; Chia-Yu ; et al. | 2020-01-09 |
Tightly coupled processor arrays using coarse grained reconfigurable architecture with iteration level commits
Grant 10,528,356 - Chen , et al. J | 2020-01-07 |
Low Precision Deep Neural Network Enabled By Compensation Instructions
App 20200005125 - Venkataramani; Swagath ; et al. | 2020-01-02 |
Matrix multiplication on a systolic array
Grant 10,489,484 - Chen , et al. Nov | 2019-11-26 |
Matrix Multiplication On A Systolic Array
App 20190236113 - Chen; Chia-Yu ; et al. | 2019-08-01 |
Methods Of Cache Preloading On A Partition Or A Context Switch
App 20190213132 - CAIN, III; Harold W. ; et al. | 2019-07-11 |
Processor And Memory Transparent Convolutional Lowering And Auto Zero Padding For Deep Neural Network Implementations
App 20190188240 - Choi; Jungwook ; et al. | 2019-06-20 |
Methods of cache preloading on a partition or a context switch
Grant 10,268,588 - Cain, III , et al. | 2019-04-23 |
Matrix multiplication on a systolic array
Grant 10,261,978 - Chen , et al. | 2019-04-16 |
Matrix multiplication on a systolic array
Grant 10,241,972 - Chen , et al. | 2019-03-26 |
Deep Neural Network Perforance Analysis On Shared Memory Accelerator Systems
App 20190080232 - Choi; Jungwook ; et al. | 2019-03-14 |
Tightly coupled processor arrays using coarse grained reconfigurable architecture with iteration level commits
Grant 10,120,685 - Chen , et al. November 6, 2 | 2018-11-06 |
Predicting Cache Misses Using Data Access Behavior And Instruction Address
App 20180300141 - Srinivasan; Vijayalakshmi ; et al. | 2018-10-18 |
Matrix Multiplication On A Systolic Array
App 20180267936 - Chen; Chia-Yu ; et al. | 2018-09-20 |
Matrix Multiplication On A Systolic Array
App 20180267938 - Chen; Chia-Yu ; et al. | 2018-09-20 |
Predicting cache misses using data access behavior and instruction address
Grant 10,007,523 - Srinivasan , et al. June 26, 2 | 2018-06-26 |
Methods Of Cache Preloading On A Partition Or A Context Switch
App 20180032438 - CAIN, III; Harold W. ; et al. | 2018-02-01 |
Methods of cache preloading on a partition or a context switch
Grant 9,804,967 - Cain, III , et al. October 31, 2 | 2017-10-31 |
Thread-based cache content saving for task switching
Grant 9,766,937 - Cain, III , et al. September 19, 2 | 2017-09-19 |
Private memory table for reduced memory coherence traffic
Grant 9,760,489 - Daly , et al. September 12, 2 | 2017-09-12 |
Private memory table for reduced memory coherence traffic
Grant 9,760,490 - Daly , et al. September 12, 2 | 2017-09-12 |
Processor with memory-embedded pipeline for table-driven computation
Grant 9,740,496 - Bose , et al. August 22, 2 | 2017-08-22 |
Processor with memory-embedded pipeline for table-driven computation
Grant 9,740,497 - Bose , et al. August 22, 2 | 2017-08-22 |
Dynamic Tuning Of A Simultaneous Multithreading Metering Architecture
App 20170212824 - ACAR; EMRAH ; et al. | 2017-07-27 |
Dynamic Tuning Of A Simultaneous Multithreading Metering Architecture
App 20170212786 - ACAR; EMRAH ; et al. | 2017-07-27 |
Prefetch threshold for cache restoration
Grant 9,697,128 - Cain, III , et al. July 4, 2 | 2017-07-04 |
Predicting out-of-order instruction level parallelism of threads in a multi-threaded processor
Grant 9,652,243 - Burcea , et al. May 16, 2 | 2017-05-16 |
Tightly Coupled Processor Arrays Using Coarse Grained Reconfigurable Architecture With Iteration Level Commits
App 20170123794 - Chen; Chia-yu ; et al. | 2017-05-04 |
Tightly Coupled Processor Arrays Using Coarse Grained Reconfigurable Architecture With Iteration Level Commits
App 20170123795 - Chen; Chia-yu ; et al. | 2017-05-04 |
Single-thread cache miss rate estimation
Grant 9,626,293 - Bonanno , et al. April 18, 2 | 2017-04-18 |
Single thread cache miss rate estimation
Grant 9,619,385 - Bonanno , et al. April 11, 2 | 2017-04-11 |
Methods Of Cache Preloading On A Partition Or A Context Switch
App 20170091105 - CAIN, III; Harold W. ; et al. | 2017-03-30 |
Methods of cache preloading on a partition or a context switch
Grant 9,529,723 - Cain, III , et al. December 27, 2 | 2016-12-27 |
Thread-based Cache Content Saving For Task Switching
App 20160364270 - Cain, III; Harold W. ; et al. | 2016-12-15 |
Prefetch Threshold For Cache Restoration
App 20160357676 - Cain, III; Harold W. ; et al. | 2016-12-08 |
Private Memory Table for Reduced Memory Coherence Traffic
App 20160328324 - Daly; David M. ; et al. | 2016-11-10 |
Private Memory Table for Reduced Memory Coherence Traffic
App 20160328323 - Daly; David M. ; et al. | 2016-11-10 |
Thread-based cache content saving for task switching
Grant 9,448,835 - Cain, III , et al. September 20, 2 | 2016-09-20 |
Thread-based cache content saving for task switching
Grant 9,436,501 - Cain, III , et al. September 6, 2 | 2016-09-06 |
Determining and storing bit error rate relationships in spin transfer torque magnetoresistive random-access memory (STT-MRAM)
Grant 9,431,084 - Bose , et al. August 30, 2 | 2016-08-30 |
Pre-computation slice merging for prefetching in a computer processor
Grant 9,430,240 - Atta , et al. August 30, 2 | 2016-08-30 |
Single-thread Cache Miss Rate Estimation
App 20160246716 - Bonanno; James J. ; et al. | 2016-08-25 |
Single-thread Cache Miss Rate Estimation
App 20160246722 - Bonanno; James J. ; et al. | 2016-08-25 |
Private memory table for reduced memory coherence traffic
Grant 9,424,192 - Daly , et al. August 23, 2 | 2016-08-23 |
Determining and storing bit error rate relationships in spin transfer torque magnetoresistive random-access memory (STT-MRAM)
Grant 9,418,721 - Bose , et al. August 16, 2 | 2016-08-16 |
Private memory table for reduced memory coherence traffic
Grant 9,411,730 - Daly , et al. August 9, 2 | 2016-08-09 |
Dynamic temperature adjustments in spin transfer torque magnetoresistive random-access memory (STT-MRAM)
Grant 9,406,368 - Bose , et al. August 2, 2 | 2016-08-02 |
Dynamic temperature adjustments in spin transfer torque magnetoresistive random-access memory (STT-MRAM)
Grant 9,351,899 - Bose , et al. May 31, 2 | 2016-05-31 |
Non-data inclusive coherent (NIC) directory for cache
Grant 9,323,676 - Bronson , et al. April 26, 2 | 2016-04-26 |
Multi-threaded processor instruction balancing through instruction uncertainty
Grant 9,298,466 - Buyuktosunoglu , et al. March 29, 2 | 2016-03-29 |
Non-data inclusive coherent (NIC) directory for cache
Grant 9,292,445 - Bronson , et al. March 22, 2 | 2016-03-22 |
Thread-based Cache Content Saving For Task Switching
App 20160062899 - Cain, III; Harold W. ; et al. | 2016-03-03 |
Thread-based Cache Content Saving For Task Switching
App 20160062791 - Cain, III; Harold W. ; et al. | 2016-03-03 |
Methods Of Cache Preloading On A Partition Or A Context Switch
App 20150331802 - Cain, III; Harold W. ; et al. | 2015-11-19 |
Multi-threaded processor instruction balancing through instruction uncertainty
Grant 9,182,991 - Buyuktosunoglu , et al. November 10, 2 | 2015-11-10 |
Methods of cache preloading on a partition or a context switch
Grant 9,092,341 - Cain, III , et al. July 28, 2 | 2015-07-28 |
Dynamic Temperature Adjustments In Spin Transfer Torque Magnetoresistive Random-access Memory (stt-mram)
App 20150206567 - Bose; Pradip ; et al. | 2015-07-23 |
Dynamic Temperature Adjustments In Spin Transfer Torque Magnetoresistive Random-access Memory (stt-mram)
App 20150206569 - Bose; Pradip ; et al. | 2015-07-23 |
Determining And Storing Bit Error Rate Relationships In Spin Transfer Torque Magnetoresistive Random-access Memory (stt-mram)
App 20150206566 - Bose; Pradip ; et al. | 2015-07-23 |
Determining And Storing Bit Error Rate Relationships In Spin Transfer Torque Magnetoresistive Random-access Memory (stt-mram)
App 20150206568 - Bose; Pradip ; et al. | 2015-07-23 |
Relaxation of synchronization for iterative convergent computations
Grant 9,069,545 - Renganarayana , et al. June 30, 2 | 2015-06-30 |
Processor With Memory-embedded Pipeline For Table-driven Computation
App 20150074356 - Bose; Pradip ; et al. | 2015-03-12 |
Processor With Memory-embedded Pipeline For Table-driven Computation
App 20150074381 - Bose; Pradip ; et al. | 2015-03-12 |
Non-data Inclusive Coherent (nic) Directory For Cache
App 20150058569 - Bronson; Timothy C. ; et al. | 2015-02-26 |
Non-data Inclusive Coherent (nic) Directory For Cache
App 20140258621 - Bronson; Timothy C. ; et al. | 2014-09-11 |
Method and system for providing an improved store-in cache
Grant 8,826,095 - Emma , et al. September 2, 2 | 2014-09-02 |
Methods Of Cache Preloading On A Partition Or A Context Switch
App 20140019689 - Cain, III; Harold W. ; et al. | 2014-01-16 |
Write-through cache optimized for dependence-free parallel regions
Grant 8,627,010 - Eichenberger , et al. January 7, 2 | 2014-01-07 |
Adaptive multi-bit error correction in endurance limited memories
Grant 8,589,762 - Rivers , et al. November 19, 2 | 2013-11-19 |
Executing touchBHT instruction to pre-fetch information to prediction mechanism for branch with taken history
Grant 8,521,999 - Emma , et al. August 27, 2 | 2013-08-27 |
Write-through cache optimized for dependence-free parallel regions
Grant 8,516,197 - Eichenberger , et al. August 20, 2 | 2013-08-20 |
Multi-threaded Processor Instruction Balancing Through Instruction Uncertainty
App 20130205118 - Buyuktosunoglu; Alper ; et al. | 2013-08-08 |
Multi-threaded Processor Instruction Balancing Through Instruction Uncertainty
App 20130205116 - Buyuktosunoglu; Alper ; et al. | 2013-08-08 |
Processor core stacking for efficient collaboration
Grant 8,417,917 - Emma , et al. April 9, 2 | 2013-04-09 |
Relaxation Of Synchronization For Iterative Convergent Computations
App 20130024662 - Renganarayana; Lakshminarayanan ; et al. | 2013-01-24 |
Adaptive Multi-bit Error Correction In Endurance Limited Memories
App 20130013977 - Rivers; Jude A. ; et al. | 2013-01-10 |
Predicting Out-of-order Instruction Level Parallelism Of Threads In A Multi-threaded Processor
App 20130007423 - Burcea; Ioana Monica ; et al. | 2013-01-03 |
Write-through Cache Optimized For Dependence-free Parallel Regions
App 20120331232 - Eichenberger; Alexandre E. ; et al. | 2012-12-27 |
Predicting Cache Misses Using Data Access Behavior And Instruction Address
App 20120284463 - Srinivasan; Vijayalakshmi ; et al. | 2012-11-08 |
Reducing broadcasts in multiprocessors
Grant 8,285,969 - Khubaib , et al. October 9, 2 | 2012-10-09 |
Write-through Cache Optimized For Dependence-free Parallel Regions
App 20120210073 - Eichenberger; Alexandre E. ; et al. | 2012-08-16 |
Structure for implementing dynamic refresh protocols for DRAM based cache
Grant 8,108,609 - Barth , et al. January 31, 2 | 2012-01-31 |
Cache Line Replacement In A Symmetric Multiprocessing Computer
App 20110320720 - Walters; Craig ; et al. | 2011-12-29 |
Method and system for implementing dynamic refresh protocols for DRAM based cache
Grant 8,024,513 - Barth, Jr. , et al. September 20, 2 | 2011-09-20 |
Prefetching Branch Prediction Mechanisms
App 20110225401 - Emma; Philip G. ; et al. | 2011-09-15 |
Iterative write pausing techniques to improve read latency of memory systems
Grant 8,004,884 - Franceschini , et al. August 23, 2 | 2011-08-23 |
Method and system for preventing livelock due to competing updates of prediction information
Grant 7,979,682 - Altman , et al. July 12, 2 | 2011-07-12 |
Method And System For Providing An Improved Store-in Cache
App 20110161780 - Emma; Philip George ; et al. | 2011-06-30 |
Limiting entries in load issued premature part of load reorder queue searched to detect invalid retrieved values to between store safe and snoop safe pointers for the congruence class
Grant 7,971,033 - Altman , et al. June 28, 2 | 2011-06-28 |
Limiting entries in load reorder queue searched for snoop check to between snoop peril and tail pointers
Grant 7,966,478 - Altman , et al. June 21, 2 | 2011-06-21 |
Method and system for integrating SRAM and DRAM architecture in set associative cache
Grant 7,962,695 - Faucher , et al. June 14, 2 | 2011-06-14 |
Method and apparatus for an efficient multi-path trace cache design
Grant 7,958,334 - Rasche , et al. June 7, 2 | 2011-06-07 |
Method and system for providing an improved store-in cache
Grant 7,941,728 - Emma , et al. May 10, 2 | 2011-05-10 |
Method and system of peak power enforcement via autonomous token-based control and management
Grant 7,930,578 - Bose , et al. April 19, 2 | 2011-04-19 |
Method and apparatus for an efficient multi-path trace cache design
Grant 7,930,525 - Rasche , et al. April 19, 2 | 2011-04-19 |
Processor Core Stacking for Efficient Collaboration
App 20110078412 - Emma; Philip G. ; et al. | 2011-03-31 |
Reducing Broadcasts In Multiprocessors
App 20110055515 - Khubaib; Khubaib ; et al. | 2011-03-03 |
Iterative Write Pausing Techniques To Improve Read Latency Of Memory Systems
App 20110026318 - Franceschini; Michele M. ; et al. | 2011-02-03 |
Context look ahead storage structures
Grant 7,657,726 - Emma , et al. February 2, 2 | 2010-02-02 |
Embedded Dram Having Multi-use Refresh Cycles
App 20090193186 - Barth, JR.; John E. ; et al. | 2009-07-30 |
Design Structure For An Embedded Dram Having Multi-use Refresh Cycles
App 20090193187 - Barth, Jr.; John E. ; et al. | 2009-07-30 |
Method And System For Integrating Sram And Dram Architecture In Set Associative Cache
App 20090144503 - Faucher; Marc R. ; et al. | 2009-06-04 |
Structure For Implementing Dynamic Refresh Protocols For Dram Based Cache
App 20090144492 - Barth; John E. ; et al. | 2009-06-04 |
Method And System For Implementing Dynamic Refresh Protocols For Dram Based Cache
App 20090144506 - Barth, JR.; John E. ; et al. | 2009-06-04 |
Sectored cache memory
Grant 7,526,610 - Emma , et al. April 28, 2 | 2009-04-28 |
Method to reduce the number of times in-flight loads are searched by store instructions in a multi-threaded processor
Grant 7,516,310 - Altman , et al. April 7, 2 | 2009-04-07 |
Method And System Of Peak Power Enforcement Via Autonomous Token-based Control And Management
App 20090089602 - Bose; Pradip ; et al. | 2009-04-02 |
Cost-conscious Pre-emptive Cache Line Displacement And Relocation Mechanisms
App 20090083492 - Buyuktosunoglu; Alper ; et al. | 2009-03-26 |
Method and apparatus for prefetching branch history information
Grant 7,493,480 - Emma , et al. February 17, 2 | 2009-02-17 |
Methods involving memory caches
Grant 7,472,226 - Emma , et al. December 30, 2 | 2008-12-30 |
Method And System For Preventing Livelock Due To Competing Updates Of Prediction Information
App 20080313445 - ALTMAN; ERIK R. ; et al. | 2008-12-18 |
Cost-conscious pre-emptive cache line displacement and relocation mechanisms
Grant 7,454,573 - Buyuktosunoglu , et al. November 18, 2 | 2008-11-18 |
Method To Reduce The Number Of Load Instructions Searched By Stores And Snoops In An Out-Of-Order Processor
App 20080276077 - Altman; Erik R. ; et al. | 2008-11-06 |
Systems and methods for mutually exclusive activation of microprocessor resources to control maximum power
Grant 7,447,923 - Bose , et al. November 4, 2 | 2008-11-04 |
Method And Apparatus For An Efficient Multi-path Trace Cache Design
App 20080270702 - Rasche; Galen A. ; et al. | 2008-10-30 |
Method To Reduce The Number Of Load Instructions Searched By Stores and Snoops In An Out-Of-Order Processor
App 20080270766 - Altman; Erik R. ; et al. | 2008-10-30 |
Method And Apparatus For An Efficient Multi-path Trace Cache Design
App 20080263326 - Rasche; Galen A. ; et al. | 2008-10-23 |
Method And System For Providing An Improved Store-in Cache
App 20080222358 - Emma; Philip George ; et al. | 2008-09-11 |
Limiting entries searched in load reorder queue to between two pointers for match with executing load instruction
Grant 7,401,209 - Altman , et al. July 15, 2 | 2008-07-15 |
Method and apparatus for an efficient multi-path trace cache design
Grant 7,366,875 - Rasche , et al. April 29, 2 | 2008-04-29 |
Context look ahead storage structures
Grant 7,337,271 - Emma , et al. February 26, 2 | 2008-02-26 |
Context Look Ahead Storage Structures
App 20080046703 - Emma; Philip George ; et al. | 2008-02-21 |
Means For Supporting And Tracking A Large Number Of In-flight Stores In An Out-of-order Processor
App 20080010440 - Altman; Erik R. ; et al. | 2008-01-10 |
Means For Supporting And Tracking A Large Number Of In-flight Loads In An Out-of-order Processor
App 20080010441 - Altman; Erik R. ; et al. | 2008-01-10 |
Method and Apparatus for Measuring the Cost of a Pipeline Event and for Displaying Images Which Permit the Visualization orf Said Cost
App 20080010555 - Emma; Phillip ; et al. | 2008-01-10 |
A Method To Reduce The Number Of Load Instructions Searched By Stores And Snoops In An Out-of-order Processor
App 20080005533 - Altman; Erik R. ; et al. | 2008-01-03 |
A Method To Reduce The Number Of Times In-flight Loads Are Searched By Store Instructions In A Multi-threaded Processor
App 20070288727 - Altman; Erik R. ; et al. | 2007-12-13 |
Method and system for preventing livelock due to competing updates of prediction information
App 20070277025 - Altman; Erik R. ; et al. | 2007-11-29 |
Systems and methods for mutually exclusive activation of microprocessor resources to control maximum power
App 20070043960 - Bose; Pradip ; et al. | 2007-02-22 |
Processor with low overhead predictive supply voltage gating for leakage power reduction
Grant 7,134,028 - Bose , et al. November 7, 2 | 2006-11-07 |
Methods and arrangements for reducing latency and snooping cost in non-uniform cache memory architectures
App 20060248287 - Buyuktosunoglu; Alper ; et al. | 2006-11-02 |
Handling permanent and transient errors using a SIMD unit
App 20060190700 - Altman; Erik ; et al. | 2006-08-24 |
Method and apparatus for an efficient multi-path trace cache design
App 20060155932 - Rasche; Galen A. ; et al. | 2006-07-13 |
Cost-conscious pre-emptive cache line displacement and relocation mechanisms
App 20060155933 - Buyuktosunoglu; Alper ; et al. | 2006-07-13 |
Context look ahead storage structures
App 20050120193 - Emma, Philip George ; et al. | 2005-06-02 |
Processor with low overhead predictive supply voltage gating for leakage power reduction
App 20040221185 - Bose, Pradip ; et al. | 2004-11-04 |
Two dimensional branch history table prefetching mechanism
App 20040015683 - Emma, Philip G. ; et al. | 2004-01-22 |
Branch history guided instruction/data prefetching
Grant 6,560,693 - Puzak , et al. May 6, 2 | 2003-05-06 |
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