Srinivasan; Maheshwaran

Patent Applications and Registrations

Patent applications and USPTO patent grants for Srinivasan; Maheshwaran.The latest application filed is for "multi-phase power system with redundancy".

Company Profile

0.19.6

Srinivasan; Maheshwaran - Santa CLara CA US
Srinivasan; Maheshwaran - Sunnyvale CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Multi-phase power system with redundancy Grant 8,901,909 - Khanna , et al. December 2, 2	2014-12-02
Multi-phase power system with redundancy Grant 8,836,306 - Khanna , et al. September 16, 2	2014-09-16
Content addressable memory having selectively interconnected shift register circuits Grant 8,631,195 - Khanna , et al. January 14, 2	2014-01-14
Multi-Phase Power System with Redundancy App 20130009479 - Khanna; Sandeep ; et al.	2013-01-10
Multi-Phase Power System with Redundancy App 20130009619 - Khanna; Sandeep ; et al.	2013-01-10
Multi-phase power system with redundancy Grant 8,274,265 - Khanna , et al. September 25, 2	2012-09-25
Determining regular expression match lengths Grant 8,051,085 - Srinivasan , et al. November 1, 2	2011-11-01
Content addressable memory device capable of parallel state information transfers Grant 8,023,300 - Srinivasan , et al. September 20, 2	2011-09-20
Content addressable memory device having state information processing circuitry Grant 8,023,301 - Srinivasan , et al. September 20, 2	2011-09-20
Compiling regular expressions for programmable content addressable memory devices Grant 7,924,590 - Starovoitov , et al. April 12, 2	2011-04-12
Reformulating regular expressions into architecture-dependent bit groups Grant 7,916,510 - Starovoitov , et al. March 29, 2	2011-03-29
Power reduction in a content addressable memory having programmable interconnect structure Grant 7,881,125 - Srinivasan , et al. February 1, 2	2011-02-01
Content addressable memory having selectively interconnected rows of counter circuits Grant 7,876,590 - Joshi , et al. January 25, 2	2011-01-25
Content Addressable Memory Having Selectively Interconnected Counter Circuits App 20100321971 - Joshi; Sachin ; et al.	2010-12-23
Content Addressable Memory Having Programmable Interconnect Structure App 20100321970 - Srinivasan; Maheshwaran ; et al.	2010-12-23
Content addresable memory having selectively interconnected counter circuits Grant 7,826,242 - Joshi , et al. November 2, 2	2010-11-02
Content addresable memory having programmable interconnect structure Grant 7,821,844 - Srinivasan , et al. October 26, 2	2010-10-26
Content Addresable Memory Having Programmable Interconnect Structure App 20100054012 - Srinivasan; Maheshwaran ; et al.	2010-03-04
Content Addresable Memory Having Selectively Interconnected Counter Circuits App 20100054013 - Joshi; Sachin ; et al.	2010-03-04
Content addresable memory having selectively interconnected counter circuits Grant 7,660,140 - Joshi , et al. February 9, 2	2010-02-09
Regular expression search engine Grant 7,656,716 - Srinivasan , et al. February 2, 2	2010-02-02
Content addressable memory having programmable interconnect structure Grant 7,643,353 - Srinivasan , et al. January 5, 2	2010-01-05

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