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name:-0.014876842498779
name:-0.0027680397033691
Srinivas; Shailendra Patent Filings

Srinivas; Shailendra

Patent Applications and Registrations

Patent applications and USPTO patent grants for Srinivas; Shailendra.The latest application filed is for "rfid integrated circuits and tags with antenna contacts on multiple surfaces".

Company Profile
2.12.7
  • Srinivas; Shailendra - Seattle WA
  • Srinivas; Shailendra - Nashua NH
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
RFID tag clock frequency reduction during tuning
Grant 10,929,734 - Hyde , et al. February 23, 2
2021-02-23
RFID tag clock frequency reduction during tuning
Grant 10,445,535 - Hyde , et al. Oc
2019-10-15
RFID tag clock frequency reduction during tuning
Grant 10,002,266 - Hyde , et al. June 19, 2
2018-06-19
RFID integrated circuits with antenna contacts on multiple surfaces
Grant 9,875,438 - Diorio , et al. January 23, 2
2018-01-23
RFID integrated circuits with antenna contacts on multiple surfaces
Grant 9,489,611 - Diorio , et al. November 8, 2
2016-11-08
Self tuning RFID tags
Grant 9,349,090 - Srinivas , et al. May 24, 2
2016-05-24
Rfid Integrated Circuits And Tags With Antenna Contacts On Multiple Surfaces
App 20150248604 - Diorio; Christopher J. ;   et al.
2015-09-03
Rfid Integrated Circuits With Antenna Contacts On Multiple Surfaces
App 20150227832 - Diorio; Christopher J. ;   et al.
2015-08-13
RFID integrated circuits with antenna contacts on multiple surfaces
Grant 9,053,400 - Diorio , et al. June 9, 2
2015-06-09
Self tuning RFID tags
Grant 8,952,792 - Srinivas , et al. February 10, 2
2015-02-10
Rfid Integrated Circuits With Antenna Contacts On Multiple Surfaces
App 20140070010 - Diorio; Christopher J. ;   et al.
2014-03-13
Rfid Integrated Circuits With Antenna Contacts On Multiple Surfaces
App 20140073071 - Diorio; Christopher J. ;   et al.
2014-03-13
Voltage regulators using a resistive chain to bias a native transistor
Grant 8,072,329 - Srinivas , et al. December 6, 2
2011-12-06
Counteracting overtunneling in nonvolatile memory cells
Grant 7,573,749 - Diorio , et al. August 11, 2
2009-08-11
Counteracting overtunneling in nonvolatile memory cells
App 20070171724 - Diorio; Christopher J. ;   et al.
2007-07-26
Counteracting overtunneling in nonvolatile memory cells using charge extraction control
Grant 7,212,446 - Diorio , et al. May 1, 2
2007-05-01
PMOS memory cell
App 20050030827 - Gilliland, Troy N. ;   et al.
2005-02-10
Counteracting overtunneling in nonvolatile memory cells
App 20040195593 - Diorio, Christopher J. ;   et al.
2004-10-07

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