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name:-0.010384082794189
name:-0.0085189342498779
name:-0.00050711631774902
Srikantam; Vamsi K. Patent Filings

Srikantam; Vamsi K.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Srikantam; Vamsi K..The latest application filed is for "imaging serial interface rom".

Company Profile
0.6.8
  • Srikantam; Vamsi K. - Sunnyvale CA
  • Srikantam; Vamsi K. - Fremont CA
  • Srikantam; Vamsi K. - Palo Alto CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Digital modulator employing a polyphase up-converter structure
Grant 7,450,659 - Corredoura , et al. November 11, 2
2008-11-11
Imaging parallel interface RAM
App 20070024713 - Baer; Richard L. ;   et al.
2007-02-01
Imaging serial interface ROM
App 20070024904 - Baer; Richard L. ;   et al.
2007-02-01
System and method for timing calibration of time-interleaved data converters
Grant 7,148,828 - Fernandez , et al. December 12, 2
2006-12-12
System And Method For Timing Calibration Of Time-interleaved Data Converters
App 20060250288 - Fernandez; Andrew D. ;   et al.
2006-11-09
Method and apparatus for defining an input state vector that achieves low power consumption in digital circuit in an idle state
Grant 7,096,374 - Srikantam , et al. August 22, 2
2006-08-22
Method and apparatus for defining an input state vector that achieves low power consumption in a digital circuit in an idle state
Grant 7,085,942 - Kopley , et al. August 1, 2
2006-08-01
Digital modulator employing a polyphase up-converter structure
App 20050213683 - Corredoura, Paul L. ;   et al.
2005-09-29
Method And Apparatus For Clock Gating Clock Trees To Reduce Power Dissipation
App 20040251931 - Srikantam, Vamsi K. ;   et al.
2004-12-16
Method and apparatus for defining an input state vector that achieves low power consumption in a digital circuit in an idle state
App 20040236971 - Kopley, Thomas E. ;   et al.
2004-11-25
Method and apparatus for defining an input state vector that achieves low power consumption in digital circuit in an idle state
App 20040236973 - Srikantam, Vamsi K. ;   et al.
2004-11-25
Method and apparatus for clock gating clock trees to reduce power dissipation
Grant 6,822,481 - Srikantam , et al. November 23, 2
2004-11-23
Low power circuit design through judicious module selection
Grant 6,601,230 - Srikantam July 29, 2
2003-07-29
Low power circuit design through judicious module selection
App 20020147959 - Srikantam, Vamsi K.
2002-10-10

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