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Sridhar; Seetharaman Patent Filings

Sridhar; Seetharaman

Patent Applications and Registrations

Patent applications and USPTO patent grants for Sridhar; Seetharaman.The latest application filed is for "vertical trench gate fet with split gate".

Company Profile
31.64.71
  • Sridhar; Seetharaman - Richardson TX
  • Sridhar; Seetharaman - Irving TX
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Drain-extended transistor
Grant 11,456,381 - Lee , et al. September 27, 2
2022-09-27
Vertical Trench Gate Fet With Split Gate
App 20220223731 - KIM; Sunglyong ;   et al.
2022-07-14
Trench Shield Isolation Layer
App 20220208601 - YANG; Hong ;   et al.
2022-06-30
Drain-extended Transistor
App 20220190158 - Lee; Meng-Chia ;   et al.
2022-06-16
Semiconductor device including a lateral insulator
Grant 11,322,594 - Ma , et al. May 3, 2
2022-05-03
High voltage lateral junction diode device
Grant 11,322,610 - Kim , et al. May 3, 2
2022-05-03
Trench shield isolation layer
Grant 11,302,568 - Yang , et al. April 12, 2
2022-04-12
Semiconductor Device Including A Lateral Insulator
App 20220052165 - Ma; Fei ;   et al.
2022-02-17
High-voltage drain expended MOS transistor
Grant 11,239,318 - Kim , et al. February 1, 2
2022-02-01
Semiconductor devices with a sloped surface
Grant 11,195,915 - Lin , et al. December 7, 2
2021-12-07
Vertical trench gate MOSFET with deep well region for junction termination
Grant 11,127,852 - Kim , et al. September 21, 2
2021-09-21
Electrostatic Discharge Guard Ring With Complementary Drain Extended Devices
App 20210167206 - Kim; Sunglyong ;   et al.
2021-06-03
Electrostatic Discharge Guard Ring With Snapback Protection
App 20210143145 - Kim; Sunglyong ;   et al.
2021-05-13
Electrostatic discharge guard ring with complementary drain extended devices
Grant 10,950,720 - Kim , et al. March 16, 2
2021-03-16
Multi-mode High Voltage Circuit
App 20210064070 - HANSCHKE; MICHAEL RYAN ;   et al.
2021-03-04
Multi-mode high voltage circuit
Grant 10,936,000 - Hanschke , et al. March 2, 2
2021-03-02
ESD guard ring with snapback protection and lateral buried layers
Grant 10,896,904 - Kim , et al. January 19, 2
2021-01-19
Resistor divider with improved resistor matching
Grant 10,840,241 - Kim , et al. November 17, 2
2020-11-17
Semiconductor Device Having Polysilicon Field Plate For Power Mosfets
App 20200335589 - Chen; Ya ping ;   et al.
2020-10-22
Semiconductor Devices With A Sloped Surface
App 20200328275 - LIN; Haian ;   et al.
2020-10-15
Trench Shield Isolation Layer
App 20200312710 - YANG; Hong ;   et al.
2020-10-01
High-voltage Drain Extended Mos Transistor
App 20200243647 - KIM; Sunglyong ;   et al.
2020-07-30
Semiconductor device having polysilicon field plate for power MOSFETs
Grant 10,720,499 - Chen , et al.
2020-07-21
High voltage CMOS with triple gate oxide
Grant 10,714,474 - Hu , et al.
2020-07-14
Resistor Divider with Improved Resistor Matching
App 20200219872 - Kim; Sunglyong ;   et al.
2020-07-09
Vertical Trench Gate Mosfet With Deep Well Region For Junction Termination
App 20200212218 - KIM; SUNGLYONG ;   et al.
2020-07-02
Vertical Trench Gate Mosfet With Integrated Schottky Diode
App 20200212219 - KIM; SUNGLYONG ;   et al.
2020-07-02
Power transistor with terminal trenches in terminal resurf regions
Grant 10,672,901 - Kawahara , et al.
2020-06-02
High Voltage Lateral Junction Diode Device
App 20200168733 - Kim; Sunglyong ;   et al.
2020-05-28
High-voltage drain extended MOS transistor
Grant 10,651,274 - Kim , et al.
2020-05-12
Integrated high-side driver for P-N bimodal power device
Grant 10,601,422 - Zhang , et al.
2020-03-24
Scheme to align LDMOS drain extension to moat
Grant 10,593,795 - Sridhar
2020-03-17
Electrostatic Discharge Guard Ring With Snapback Protection
App 20200075576 - Kim; Sunglyong ;   et al.
2020-03-05
Semiconductor product and fabrication process
Grant 10,573,553 - Yang , et al. Feb
2020-02-25
High voltage lateral junction diode device
Grant 10,559,681 - Kim , et al. Feb
2020-02-11
Multiple shielding trench gate FET
Grant 10,541,326 - Kawahara , et al. Ja
2020-01-21
Electrostatic discharge guard ring with snapback protection
Grant 10,504,885 - Kim , et al. Dec
2019-12-10
Semiconductor Device Having Polysilicon Field Plate For Power Mosfets
App 20190296115 - Chen; Ya ping ;   et al.
2019-09-26
Electrostatic Discharge Guard Ring With Snapback Protection
App 20190279976 - Kim; Sunglyong ;   et al.
2019-09-12
Power Transistor With Terminal Trenches In Terminal Resurf Regions
App 20190259868 - Kawahara; Hideaki ;   et al.
2019-08-22
Electrostatic discharge guard ring with snapback protection
Grant 10,347,621 - Kim , et al. July 9, 2
2019-07-09
High-voltage Drain Extended Mos Transistor
App 20190206997 - KIM; Sunglyong ;   et al.
2019-07-04
High Voltage Lateral Junction Diode Device
App 20190198666 - Kim; Sunglyong ;   et al.
2019-06-27
Deep trench isolation with tank contact grounding
Grant 10,304,719 - Zhang , et al.
2019-05-28
Semiconductor Product And Fabrication Process
App 20190157142 - YANG; Hong ;   et al.
2019-05-23
Electrostatic Discharge Guard Ring With Complementary Drain Extended Devices
App 20190123555 - Kim; Sunglyong ;   et al.
2019-04-25
Power transistor with terminal trenches in terminal resurf regions
Grant 10,256,337 - Kawahara , et al.
2019-04-09
Semiconductor product and fabrication process
Grant 10,211,096 - Yang , et al. Feb
2019-02-19
Power Transistor With Terminal Trenches In Terminal Resurf Regions
App 20180226502 - Kawahara; Hideaki ;   et al.
2018-08-09
Low resistance sinker contact
Grant 9,991,350 - Yang , et al. June 5, 2
2018-06-05
Electrostatic Discharge Guard Ring With Snapback Protection
App 20180102357 - Kim; Sunglyong ;   et al.
2018-04-12
Integrated High-side Driver For P-n Bimodal Power Device
App 20180097517 - Zhang; Yongxi ;   et al.
2018-04-05
Silicon epitaxy for high aspect ratio, substantially perpendicular deep silicon trench
Grant 9,905,638 - Tominari , et al. February 27, 2
2018-02-27
Integrated high-side driver for P-N bimodal power device
Grant 9,843,322 - Zhang , et al. December 12, 2
2017-12-12
High Voltage Cmos With Triple Gate Oxide
App 20170301673 - Hu; Binghua ;   et al.
2017-10-19
Multiple Shielding Trench Gate FET
App 20170288052 - Kawahara; Hideaki ;   et al.
2017-10-05
Integrated High-Side Driver For P-N Bimodal Power Device
App 20170264289 - Zhang; Yongxi ;   et al.
2017-09-14
High voltage CMOS with triple gate oxide
Grant 9,741,718 - Hu , et al. August 22, 2
2017-08-22
Reduced area power devices using deep trench isolation
Grant 9,735,265 - Zhang , et al. August 15, 2
2017-08-15
Multiple shielding trench gate FET
Grant 9,711,639 - Kawahara , et al. July 18, 2
2017-07-18
Deep Trench Isolation With Tank Contact Grounding
App 20170133261 - Zhang; Yongxi ;   et al.
2017-05-11
Reduced Area Power Devices Using Deep Trench Isolation
App 20170062611 - ZHANG; Yongxi ;   et al.
2017-03-02
Deep trench isolation with tank contact grounding
Grant 9,553,011 - Zhang , et al. January 24, 2
2017-01-24
Multiple Shielding Trench Gate FET
App 20160329423 - Kawahara; Hideaki ;   et al.
2016-11-10
Low Resistance Sinker Contact
App 20160315159 - YANG; Hong ;   et al.
2016-10-27
Scheme To Align Ldmos Drain Extension To Moat
App 20160225897 - SRIDHAR; Seetharaman
2016-08-04
Low resistance sinker contact
Grant 9,397,180 - Yang , et al. July 19, 2
2016-07-19
Scheme to align LDMOS drain extension to moat
Grant 9,337,330 - Sridhar May 10, 2
2016-05-10
Multiple shielding trench gate fet
Grant 9,299,830 - Kawahara , et al. March 29, 2
2016-03-29
Reduction of polysilicon residue in a trench for polysilicon trench filling processes
Grant 9,230,851 - Molloy , et al. January 5, 2
2016-01-05
LDMOS CHC reliability
Grant 9,196,728 - Sridhar November 24, 2
2015-11-24
High Voltage Cmos With Triple Gate Oxide
App 20150325577 - Hu; Binghua ;   et al.
2015-11-12
High voltage CMOS with triple gate oxide
Grant 9,117,687 - Hu , et al. August 25, 2
2015-08-25
Transistor With Improved Radiation Hardness
App 20150187957 - DING; Hao ;   et al.
2015-07-02
Ldmos Chc Reliability
App 20150187937 - SRIDHAR; Seetharaman
2015-07-02
Scheme To Align Ldmos Drain Extension To Moat
App 20150179792 - SRIDHAR; Seetharaman
2015-06-25
Reduced Area Power Devices Using Deep Trench Isolation
App 20150171211 - ZHANG; Yongxi ;   et al.
2015-06-18
Reduction Of Polysilicon Residue In A Trench For Polysilicon Trench Filling Processes
App 20140220761 - MOLLOY; SIMON JOHN ;   et al.
2014-08-07
Deep Trench Isolation With Tank Contact Grounding
App 20140183662 - ZHANG; Yongxi ;   et al.
2014-07-03
Strained LDMOS and demos
Grant 8,754,497 - Denison , et al. June 17, 2
2014-06-17
Dual RESURF trench field plate in vertical MOSFET
Grant 8,748,976 - Kocon , et al. June 10, 2
2014-06-10
Method for integrating silicon germanium and carbon doped silicon with source/drain regions in a strained CMOS process flow
Grant 8,574,979 - Sridhar November 5, 2
2013-11-05
Thick gate oxide for LDMOS and DEMOS
Grant 8,470,675 - Sridhar , et al. June 25, 2
2013-06-25
High Voltage Cmos With Triple Gate Oxide
App 20130105909 - Hu; Binghua ;   et al.
2013-05-02
Lateral metal oxide semiconductor drain extension design
Grant 8,426,281 - Denison , et al. April 23, 2
2013-04-23
Thick Gate Oxide For Ldmos And Demos
App 20120100679 - Sridhar; Seetharaman ;   et al.
2012-04-26
Implanted well breakdown in high voltage devices
Grant 8,134,212 - Hao , et al. March 13, 2
2012-03-13
Methods for reducing gate dielectric thinning on trench isolation edges and integrated circuits therefrom
Grant 8,114,744 - Chatterjee , et al. February 14, 2
2012-02-14
Application of different isolation schemes for logic and embedded memory
Grant 8,067,279 - Sadra , et al. November 29, 2
2011-11-29
Method of planarizing a semiconductor device
Grant 8,017,493 - Ali , et al. September 13, 2
2011-09-13
Lateral Metal Oxide Semiconductor Drain Extension Design
App 20110076822 - Denison; Marie ;   et al.
2011-03-31
Use of a single mask during the formation of a transistor's drain extension and recessed strained epi regions
Grant 7,892,931 - Sridhar , et al. February 22, 2
2011-02-22
Trench isolation comprising process having multiple gate dielectric thicknesses and integrated circuits therefrom
Grant 7,888,196 - Sridhar , et al. February 15, 2
2011-02-15
Strained Ldmos And Demos
App 20100314670 - Denison; Marie ;   et al.
2010-12-16
Lateral metal oxide semiconductor drain extension design
Grant 7,847,351 - Denison , et al. December 7, 2
2010-12-07
Method For Integrating Silicon Germanium And Carbon Doped Silicon Within A Strained Cmos Flow
App 20100224937 - Sridhar; Seetharaman
2010-09-09
Methods For Reducing Gate Dielectric Thinning On Trench Isolation Edges And Integrated Circuits Therefrom
App 20100164004 - CHATTERJEE; AMITAVA ;   et al.
2010-07-01
Trench Isolation Comprising Process Having Multiple Gate Dielectric Thicknesses And Integrated Circuits Therefrom
App 20100163998 - Sridhar; Seetharaman ;   et al.
2010-07-01
Application of different isolation schemes for logic and embedded memory
Grant 7,662,688 - Sadra , et al. February 16, 2
2010-02-16
Method of Planarizing a Semiconductor Device
App 20090280618 - Ali; Abbas ;   et al.
2009-11-12
Lateral Metal Oxide Semiconductor Drain Extension Design
App 20090256199 - Denison; Marie ;   et al.
2009-10-15
Application of Different Isolation Schemes for Logic and Embedded Memory
App 20090258471 - Sadra; Kayvan ;   et al.
2009-10-15
Methods to selectively protect NMOS regions, PMOS regions, and gate layers during EPI process
Grant 7,514,309 - Sridhar , et al. April 7, 2
2009-04-07
Method For Forming Self-aligned Wells To Support Tight Spacing
App 20090042377 - Sridhar; Seetharaman
2009-02-12
Method For Integrating Silicon Germanium And Carbon Doped Silicon Within A Strained Cmos Flow
App 20080283926 - Sridhar; Seetharaman
2008-11-20
Silicon Germanium Flow With Raised Source/drain Regions In The Nmos
App 20080283936 - Sridhar; Seetharaman ;   et al.
2008-11-20
Trench Isolation Structure And Method Of Manufacture Therefor
App 20080283935 - Sridhar; Seetharaman ;   et al.
2008-11-20
Use of a Single Mask During the Formation of a Transistor's Drain Extension and Recessed Strained Epi Regions
App 20080153221 - Sridhar; Seetharaman ;   et al.
2008-06-26
Application of Different Isolation Schemes for Logic and Embedded Memory
App 20080003772 - Sadra; Kayvan ;   et al.
2008-01-03
Application of different isolation schemes for logic and embedded memory
Grant 7,314,800 - Sadra , et al. January 1, 2
2008-01-01
Application of different isolation schemes for logic and embedded memory
Grant 7,193,277 - Sadra , et al. March 20, 2
2007-03-20
Method to selectively strain NMOS devices using a cap poly layer
Grant 7,172,936 - Sridhar , et al. February 6, 2
2007-02-06
Method to selectively recess ETCH regions on a wafer surface using capoly as a mask
Grant 7,169,659 - Rotondaro , et al. January 30, 2
2007-01-30
Methods to selectively protect NMOS regions, PMOS regions, and gate layers during EPI process
App 20070020839 - Sridhar; Seetharaman ;   et al.
2007-01-25
Application of different isolation schemes for logic and embedded memory
Grant 7,141,468 - Sadra , et al. November 28, 2
2006-11-28
A MOS Transistor with a Three-Step Source/Drain Implant
App 20060246645 - Nandakumar; Mahalingam ;   et al.
2006-11-02
Application of different isolation schemes for logic and embedded memory
App 20060084230 - Sadra; Kayvan ;   et al.
2006-04-20
Method to selectively strain NMOS devices using a cap poly layer
App 20060073650 - Sridhar; Seetharaman ;   et al.
2006-04-06
Method to selectively recess ETCH regions on a wafer surface using capoly as a mask
App 20060046367 - Rotondaro; Antonio L.P. ;   et al.
2006-03-02
MOS transistor with a three-step source/drain implant
App 20050156236 - Nandakumar, Mahalingam ;   et al.
2005-07-21
Application of different isolation schemes for logic and embedded memory
App 20050145949 - Sadra, Kayvan ;   et al.
2005-07-07
Method and system for improving performance of MOSFETs
App 20050090082 - Sridhar, Seetharaman ;   et al.
2005-04-28
Application of different isolation schemes for logic and embedded memory
App 20050087810 - Sadra, Kayvan ;   et al.
2005-04-28
High performance PNP bipolar device fully compatible with CMOS process
Grant 6,794,730 - Kim , et al. September 21, 2
2004-09-21
Process to improve Nwell-Nwell isolation with a blanket low dose high energy implant
App 20040169236 - Sridhar, Seetharaman ;   et al.
2004-09-02
Process of increasing screen dielectric thickness
Grant 6,723,616 - Sridhar , et al. April 20, 2
2004-04-20
Reduction in well implant channeling and resulting latchup characteristics in shallow trench isolation by implanting wells through nitride
Grant 6,617,217 - Nandakumar , et al. September 9, 2
2003-09-09
Process of increasing screen dielectric thickness
App 20030060019 - Sridhar, Seetharaman ;   et al.
2003-03-27
Process to improve Nwell-Nwell isolation with a blanket low dose high energy implant
App 20020086499 - Sridhar, Seetharaman ;   et al.
2002-07-04
High performance PNP bipolar device fully compatible with CMOS process
App 20020084495 - Kim, Youngmin ;   et al.
2002-07-04
Reduction in well implant channeling and resulting latchup characteristics in shallow trench ilolation by implanting wells through nitride
App 20020042184 - Nandakumar, Mahalingam ;   et al.
2002-04-11

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