Speers; Theodore

Patent Applications and Registrations

Patent applications and USPTO patent grants for Speers; Theodore.The latest application filed is for "secure digest for pld configuration data".

Company Profile

0.29.28

Speers; Theodore - San Jose CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
On-chip probe circuit for detecting faults in an FPGA Grant 9,000,807 - Greene , et al. April 7, 2	2015-04-07
Secure Digest For Pld Configuration Data App 20140043059 - Speers; Theodore ; et al.	2014-02-13
On-Chip Probe Circuit for Detecting Faults in an FPGA App 20140006887 - Greene; Jonathan W. ; et al.	2014-01-02
On-Chip Probe Circuit for Detecting Faults in an FPGA App 20140002136 - Greene; Jonathan W. ; et al.	2014-01-02
Programmable logic device with programmable wakeup pins Grant 8,040,151 - Speers October 18, 2	2011-10-18
Programmable system on a chip Grant 7,937,601 - Bakker , et al. May 3, 2	2011-05-03
Field programmable gate array including a non-volatile user memory and method for programming Grant 7,919,979 - Mason , et al. April 5, 2	2011-04-05
PLD providing soft wakeup logic Grant 7,884,640 - Greene , et al. February 8, 2	2011-02-08
Pld Providing Soft Wakeup Logic App 20100156457 - Greene; Jonathan W. ; et al.	2010-06-24
Programmable Logic Device With Programmable Wakeup Pins App 20100156458 - Speers; Theodore	2010-06-24
Non-volatile memory architecture for programmable-logic-based system on a chip Grant 7,675,320 - Speers , et al. March 9, 2	2010-03-09
Programmable System On A Chip App 20090292937 - Bakker; Greg ; et al.	2009-11-26
System-on-a-chip integrated circuit including dual-function analog and digital inputs Grant 7,616,026 - Balasubramanian , et al. November 10, 2	2009-11-10
Programmable system on a chip Grant 7,613,943 - Bakker , et al. November 3, 2	2009-11-03
Clock-generator architecture for a programmable-logic-based system on a chip Grant 7,579,895 - Sun , et al. August 25, 2	2009-08-25
Integrated circuit device having state-saving and initialization feature Grant 7,560,952 - Zhu , et al. July 14, 2	2009-07-14
Clock-generator architecture for a programmable-logic-based system on a chip Grant 7,501,872 - Sun , et al. March 10, 2	2009-03-10
Field Programmable Gate Array Including A Nonvolatile User Memory And Method For Programming App 20090058462 - Mason; Martin ; et al.	2009-03-05
Programmable system on a chip Grant 7,487,376 - Bakker , et al. February 3, 2	2009-02-03
Clock-generator Architecture For A Programmable-logic-based System On A Chip App 20080309393 - Sun; Shin-Nan ; et al.	2008-12-18
Face-to-face Bonded I/o Circuit Die And Functional Logic Circuit Die System App 20080309371 - Speers; Theodore	2008-12-18
Face-to-face bonded I/O circuit die and functional logic circuit die system Grant 7,459,772 - Speers December 2, 2	2008-12-02
Non-volatile Memory Configuration Scheme For Volatile-memory-based Programmable Circuits In An Fpga App 20080272804 - Speers; Theodore	2008-11-06
System-on-a-chip Integrated Circuit Including Dual-function Analog And Digital Inputs App 20080272803 - Balasubramanian; Rabindranath ; et al.	2008-11-06
Non-volatile Memory Architecture For Programmable-logic-based System On A Chip App 20080224731 - Speers; Theodore ; et al.	2008-09-18
Synchronous First-in/first-out Block Memory For A Field Programmable Gate Array App 20080218207 - Elftmann; Daniel ; et al.	2008-09-11
System-on-a-chip integrated circuit including dual-function analog and digital inputs Grant 7,423,451 - Balasubramanian , et al. September 9, 2	2008-09-09
Non-volatile memory configuration scheme for volatile-memory-based programmable circuits in an FPGA Grant 7,414,428 - Speers August 19, 2	2008-08-19
Architecture For Face-to-face Bonding Between Substrate And Multiple Daughter Chips App 20080191363 - Plants; William C. ; et al.	2008-08-14
Synchronous first-in/first-out block memory for a field programmable gate array Grant 7,394,289 - Elftmann , et al. July 1, 2	2008-07-01
Non-volatile memory architecture for programmable-logic-based system on a chip Grant 7,385,418 - Speers , et al. June 10, 2	2008-06-10
Programmable System On A Chip App 20080122481 - Bakker; Greg ; et al.	2008-05-29
Integrated Circuit Device Having State-saving And Intitalization Feature App 20080122484 - Zhu; Limin ; et al.	2008-05-29
Architecture for face-to-face bonding between substrate and multiple daughter chips Grant 7,358,601 - Plants , et al. April 15, 2	2008-04-15
Integrated circuit device having state-saving and initialization feature Grant 7,352,206 - Zhu , et al. April 1, 2	2008-04-01
Programmable System On A Chip App 20080048717 - Bakker; Greg ; et al.	2008-02-28
Clock-generator Architecture For A Programmable-logic-based System On A Chip App 20080030235 - Sun; Shin-Nan ; et al.	2008-02-07
Clock-generator architecture for a programmable-logic-based system on a chip Grant 7,298,178 - Sun , et al. November 20, 2	2007-11-20
Mixed-signal system-on-a-chip analog signal direct interconnection through programmable logic control Grant 7,280,058 - Zhu , et al. October 9, 2	2007-10-09
Synchronous First-in/first-out Block Memory For A Field Programmable Gate Array App 20070182446 - Elftmann; Daniel ; et al.	2007-08-09
Programmable System On A Chip App 20070176631 - Bakker; Greg ; et al.	2007-08-02
Synchronous first-in/first-out block memory for a field programmable gate array Grant 7,227,380 - Elftmann , et al. June 5, 2	2007-06-05
System-on-a-chip Integrated Circuit Including Dual-function Analog And Digital Inputs App 20070046325 - Balasubramanian; Rabindranath ; et al.	2007-03-01
Programmable system on a chip Grant 7,170,315 - Bakker , et al. January 30, 2	2007-01-30
Non-volatile Memory Configuration Scheme For Volatile-memory-based Programmable Circuits In An Fpga App 20060279327 - Speers; Theodore	2006-12-14
Non-volatile Memory Architecture For Programmable-logic-based System On A Chip App 20060255832 - Speers; Theodore ; et al.	2006-11-16
System-on-a-chip integrated circuit including dual-function analog and digital inputs Grant 7,129,746 - Balasubramanian , et al. October 31, 2	2006-10-31
Non-volatile memory configuration scheme for volatile-memory-based programmable circuits in an FPGA Grant 7,112,993 - Speers September 26, 2	2006-09-26
Non-volatile memory architecture for programmable-logic-based system on a chip Grant 7,102,384 - Speers , et al. September 5, 2	2006-09-05
Clock-generator architecture for a programmable-logic-based system on a chip Grant 7,102,391 - Sun , et al. September 5, 2	2006-09-05
Non-volatile memory configuration scheme for volatile-memory-based programmable circuits in an FPGA App 20060139053 - Speers; Theodore	2006-06-29
Synchronous first-in/first-out block memory for a field programmable gate array App 20060082385 - Elftmann; Daniel ; et al.	2006-04-20
Face-to-face bonded I/O circuit die and functional logic circuit die system App 20060071332 - Speers; Theodore	2006-04-06
Synchronous first-in/first-out block memory for a field programmable gate array Grant 6,980,027 - Elftmann , et al. December 27, 2	2005-12-27
Programmable system on a chip App 20050237083 - Bakker, Greg ; et al.	2005-10-27
Synchronous first-in/first-out block memory for a field programmable gate array App 20050036398 - Elftmann, Daniel ; et al.	2005-02-17
Synchronous first-in/first-out block memory for a field programmable gate array Grant 6,838,902 - Elftmann , et al. January 4, 2	2005-01-04

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