Sousa; Joseph L.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Sousa; Joseph L..The latest application filed is for "circuits and methods to reduce distortion in an amplifier".

Company Profile

0.7.5

Sousa; Joseph L. - Billerica MA
Sousa; Joseph L. - Lawrence MA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Electrical signal measurement using subdivision Grant 11,428,719 - Sousa , et al. August 30, 2	2022-08-30
Circuits and methods to reduce distortion in an amplifier Grant 11,095,254 - Sousa August 17, 2	2021-08-17
Circuits And Methods To Reduce Distortion In An Amplifier App 20210234514 - Sousa; Joseph L.	2021-07-29
Electrical Signal Measurement Using Subdivision App 20210215745 - Sousa; Joseph L. ; et al.	2021-07-15
Time-multiplexed residue amplifier Grant 8,018,370 - Thomas , et al. September 13, 2	2011-09-13
Time-multiplexed Residue Amplifier App 20110187573 - Thomas; Andrew J. ; et al.	2011-08-04
Circuits and methods to reduce or eliminate signal-dependent modulation of a reference bias Grant 7,907,074 - Zanchi , et al. March 15, 2	2011-03-15
Circuits and methods for canceling signal dependent capacitance Grant 7,683,695 - Sousa , et al. March 23, 2	2010-03-23
Circuits and methods to reduce or eliminate signal-dependent modulation of a reference bias App 20090121912 - Zanchi; Alfio ; et al.	2009-05-14
Circuits and methods for canceling signal dependent capacitance App 20070103845 - Sousa; Joseph L. ; et al.	2007-05-10
CMOS switch with linearized gate capacitance Grant 6,522,187 - Sousa February 18, 2	2003-02-18
Multiple channel analog to digital converter Grant 5,638,072 - Van Auken , et al. June 10, 1	1997-06-10

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