| Patent | Date |
|---|
High Performance Integrated Rf Passives Using Dual Lithography Process
App 20220102261 - ELSHERBINI; Adel A. ; et al. | 2022-03-31 |
High performance integrated RF passives using dual lithography process
Grant 11,227,825 - Elsherbini , et al. January 18, 2 | 2022-01-18 |
Panel Level Packaging For Multi-die Products Interconnected With Very High Density (vhd) Interconnect Layers
App 20210343653 - PIETAMBARAM; Srinivas V. ; et al. | 2021-11-04 |
Panel level packaging for multi-die products interconnected with very high density (VHD) interconnect layers
Grant 11,101,222 - Pietambaram , et al. August 24, 2 | 2021-08-24 |
Scalable Embedded Silicon Bridge Via Pillars In Lithographically Defined Vias, And Methods Of Making Same
App 20210225807 - ELSHERBINI; Adel A. ; et al. | 2021-07-22 |
Semiconductor Packaging With High Density Interconnects
App 20210193583 - ELSHERBINI; Adel A. ; et al. | 2021-06-24 |
Scalable embedded silicon bridge via pillars in lithographically defined vias, and methods of making same
Grant 11,004,824 - Elsherbini , et al. May 11, 2 | 2021-05-11 |
Die interconnect substrate, an electrical device, and a method for forming a die interconnect substrate
Grant 10,978,399 - Darmawikarta , et al. April 13, 2 | 2021-04-13 |
Package power delivery using plane and shaped vias
Grant 10,971,416 - Bharath , et al. April 6, 2 | 2021-04-06 |
Semiconductor packaging with high density interconnects
Grant 10,971,453 - Elsherbini , et al. April 6, 2 | 2021-04-06 |
Package Substrate With High-density Interconnect Layer Having Pillar And Via Connections For Fan Out Scaling
App 20210066232 - May; Robert Alan ; et al. | 2021-03-04 |
Sacrificial Pads To Prevent Galvanic Corrosion Of Fli Bumps In Emib Packages
App 20210035818 - IBRAHIM; Tarek A. ; et al. | 2021-02-04 |
Package substrate with high-density interconnect layer having pillar and via connections for fan out scaling
Grant 10,872,872 - May , et al. December 22, 2 | 2020-12-22 |
Method for making a flexible wearable circuit
Grant 10,798,817 - Aleksov , et al. October 6, 2 | 2020-10-06 |
Die Interconnect Substrate, an Electrical Device, and a Method for Forming a Die Interconnect Substrate
App 20200051915 - Darmawikarta; Kristof ; et al. | 2020-02-13 |
Package Substrate With High-density Interconnect Layer Having Pillar And Via Connections For Fan Out Scaling
App 20190363063 - MAY; Robert Alan ; et al. | 2019-11-28 |
Package Power Delivery Using Plane And Shaped Vias
App 20190355636 - Bharath; Krishna ; et al. | 2019-11-21 |
Package power delivery using plane and shaped vias
Grant 10,410,939 - Bharath , et al. Sept | 2019-09-10 |
Semiconductor Packaging With High Density Interconnects
App 20190259705 - Elsherbini; Adel A. ; et al. | 2019-08-22 |
Panel Level Packaging For Multi-die Products Interconnected With Very High Density (vhd) Interconnect Layers
App 20190189563 - PIETAMBARAM; Srinivas V. ; et al. | 2019-06-20 |
Stretchable electronic assembly
Grant 10,327,330 - Aleksov , et al. | 2019-06-18 |
Bendable and stretchable electronic devices and methods
Grant 10,204,855 - Levander , et al. Feb | 2019-02-12 |
Improved Package Power Delivery Using Plane And Shaped Vias
App 20180331003 - BHARATH; Krishna ; et al. | 2018-11-15 |
High Performance Integrated Rf Passives Using Dual Lithography Process
App 20180315690 - ELSHERBINI; Adel A. ; et al. | 2018-11-01 |
Stretchable Electronic Assembly
App 20180295720 - Aleksov; Aleksandar ; et al. | 2018-10-11 |
Scalable Embedded Silicon Bridge Via Pillars In Lithographically Defined Vias, And Methods Of Making Same
App 20180182707 - Elsherbini; Adel A. ; et al. | 2018-06-28 |
Structural Brace For Electronic Circuit With Stretchable Substrate
App 20170344055 - Aleksov; Aleksandar ; et al. | 2017-11-30 |
Panel level fabrication of package substrates with integrated stiffeners
Grant 9,832,860 - Starkston , et al. November 28, 2 | 2017-11-28 |
Semiconductor package with embedded die and its methods of fabrication
Grant 9,780,054 - Guzek , et al. October 3, 2 | 2017-10-03 |
Pad-less interconnect for electrical coreless substrate
Grant 9,691,727 - Soto Gonzalez , et al. June 27, 2 | 2017-06-27 |
Methods of forming sensor integrated packages and structures formed thereby
Grant 9,505,607 - Lee , et al. November 29, 2 | 2016-11-29 |
Bendable And Stretchable Electronic Devices And Methods
App 20160284630 - Levander; Alejandro ; et al. | 2016-09-29 |
Methods Of Forming Sensor Integrated Packages And Structures Formed Thereby
App 20160280535 - Lee; Kyu Oh ; et al. | 2016-09-29 |
Panel Level Fabrication Of Package Substrates With Integrated Stiffeners
App 20160095209 - STARKSTON; Robert ; et al. | 2016-03-31 |
Forming die backside coating structures with coreless packages
Grant 9,165,914 - Manepalli , et al. October 20, 2 | 2015-10-20 |
Processes Of Making Pad-less Interconnect For Electrical Coreless Substrate
App 20150221608 - SOTO GONZALEZ; Javier ; et al. | 2015-08-06 |
Semiconductor Package With Embedded Die And Its Methods Of Fabrication
App 20150050781 - Guzek; John S. ; et al. | 2015-02-19 |
Forming Die Backside Coating Structures With Coreless Packages
App 20130252376 - Manepalli; Rahul N. ; et al. | 2013-09-26 |
| 