Patent | Date |
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Transistor Using Selective Undercut At Gate Conductor And Gate Insulator Corner App 20180204926 - Abou-Khalil; Michel J. ;   et al. | 2018-07-19 |
SOI-MOSFET gate insulation layer with different thickness Grant 9,978,849 - Abou-Khalil , et al. May 22, 2 | 2018-05-22 |
Transistor Using Selective Undercut At Gate Conductor And Gate Insulator Corner App 20170186845 - Abou-Khalil; Michel J. ;   et al. | 2017-06-29 |
Scaling of bipolar transistors Grant 8,872,236 - Joseph , et al. October 28, 2 | 2014-10-28 |
Method for fabricating strained silicon-on-insulator structures and strained silicon-on insulator structures formed thereby Grant 8,450,806 - Furukawa , et al. May 28, 2 | 2013-05-28 |
SOI (silicon on insulator) substrate improvements Grant 8,288,821 - Botula , et al. October 16, 2 | 2012-10-16 |
Method and structures for improving substrate loss and linearity in SOI substrates Grant 8,089,126 - Botula , et al. January 3, 2 | 2012-01-03 |
Scaling Of Bipolar Transistors App 20110278570 - Joseph; Alvin Jose ;   et al. | 2011-11-17 |
Scaling of bipolar transistors Grant 8,020,128 - Joseph , et al. September 13, 2 | 2011-09-13 |
SOI substrate contact with extended silicide area Grant 7,939,896 - Dang , et al. May 10, 2 | 2011-05-10 |
Method And Structures For Improving Substrate Loss And Linearity In Soi Substrates App 20110018060 - Botula; Alan Bernard ;   et al. | 2011-01-27 |
Scaling Of Bipolar Transistors App 20100327280 - Joseph; Alvin Jose ;   et al. | 2010-12-30 |
Soi (silicon On Insulator) Substrate Improvements App 20100230752 - Botula; Alan Bernard ;   et al. | 2010-09-16 |
Trench forming method and structure Grant 7,772,083 - Botula , et al. August 10, 2 | 2010-08-10 |
Trench Forming Method And Structure App 20100164075 - Botula; Alan Bernard ;   et al. | 2010-07-01 |
Method for fabricating strained silicon-on-insulator structures and strained silicon-on-insulator structures formed thereby Grant 7,704,855 - Furukawa , et al. April 27, 2 | 2010-04-27 |
Soi Substrate Contact With Extended Silicide Area App 20100084736 - Dang; Dinh ;   et al. | 2010-04-08 |
SOI substrate contact with extended silicide area Grant 7,675,121 - Dang , et al. March 9, 2 | 2010-03-09 |
Soi Substrate Contact With Extended Silicide Area App 20090090970 - Dang; Dinh ;   et al. | 2009-04-09 |
Soi Substrate Contact With Extended Silicide Area App 20090093092 - DANG; DINH ;   et al. | 2009-04-09 |
Method For Fabricating Strained Silicon-on-insulator Structures And Strained Silicon-on-insulator Structures Formed Thereby App 20080050931 - Furukawa; Toshiharu ;   et al. | 2008-02-28 |
Method for fabricating strained silicon-on-insulator structures and strained silicon-on insulator structures formed thereby App 20050227498 - Furukawa, Toshiharu ;   et al. | 2005-10-13 |
High resolution dopant/impurity incorporation in semiconductors via a scanned atomic force probe Grant 6,531,379 - Furukawa , et al. March 11, 2 | 2003-03-11 |
Micro heating of selective regions Grant 6,514,840 - Barrett , et al. February 4, 2 | 2003-02-04 |
Reduction of reverse short channel effects by implantation of neutral dopants App 20020063294 - Brown, Jeffrey Scott ;   et al. | 2002-05-30 |
Reduction of reverse short channel effects by deep implantation of neutral dopants Grant 6,352,912 - Brown , et al. March 5, 2 | 2002-03-05 |
Micro Heating Of Selective Regions App 20010044175 - BARRETT, HOWARD TED ;   et al. | 2001-11-22 |
High resolution dopant/impurity incorporation in semiconductors via a scanned atomic force probe App 20010021575 - Furukawa, Toshiharu ;   et al. | 2001-09-13 |
High resolution dopant/impurity incorporation in semiconductors via a scanned atomic force probe Grant 6,251,755 - Furukawa , et al. June 26, 2 | 2001-06-26 |