Slinkman; James A.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Slinkman; James A..The latest application filed is for "integrated circuit heat dissipation using nanostructures".

Company Profile

4.69.62

Slinkman; James A. - Montpelier VT
Slinkman; James A. - Montpellier VT

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Integrated circuit heat dissipation using nanostructures Grant 11,152,495 - Botula , et al. October 19, 2	2021-10-19
Integrated circuit heat dissipation using nanostructures Grant 11,081,572 - Botula , et al. August 3, 2	2021-08-03
Integrated circuit heat dissipation using nanostructures Grant 10,629,710 - Botula , et al.	2020-04-21
Integrated circuit heat dissipation using nanostructures Grant 10,600,893 - Botula , et al.	2020-03-24
Integrated Circuit Heat Dissipation Using Nanostructures App 20200027973 - BOTULA; Alan B. ; et al.	2020-01-23
Integrated Circuit Heat Dissipation Using Nanostructures App 20190363182 - BOTULA; Alan B. ; et al.	2019-11-28
Integrated Circuit Heat Dissipation Using Nanostructures App 20180331207 - BOTULA; Alan B. ; et al.	2018-11-15
Integrated circuit heat dissipation using nanostructures Grant 10,109,553 - Botula , et al. October 23, 2	2018-10-23
Integrated Circuit Heat Dissipation Using Nanostructures App 20180294346 - BOTULA; Alan B. ; et al.	2018-10-11
Integrated circuit heat dissipation using nanostructures Grant 10,068,827 - Botula , et al. September 4, 2	2018-09-04
Air Gaps Formed By Porous Silicon Removal App 20170330933 - Phelps; Richard A. ; et al.	2017-11-16
Air gaps formed by porous silicon removal Grant 9,755,015 - Phelps , et al. September 5, 2	2017-09-05
Integrated Circuit Heat Dissipation Using Nanostructures App 20170200665 - BOTULA; Alan B. ; et al.	2017-07-13
Integrated circuit heat dissipation using nanostructures Grant 9,704,978 - Botula , et al. July 11, 2	2017-07-11
Integrated circuit heat dissipation using nanostructures Grant 9,666,701 - Botula , et al. May 30, 2	2017-05-30
Single-chip field effect transistor (FET) switch with silicon germanium (SiGe) power amplifier and methods of forming Grant 9,653,477 - Cheng , et al. May 16, 2	2017-05-16
Single-chip field effect transistor (FET) switch with silicon germanium (SiGe) power amplifier and methods of forming Grant 9,646,993 - Cheng , et al. May 9, 2	2017-05-09
Integrated Circuit Heat Dissipation Using Nanostructures App 20170117206 - BOTULA; Alan B. ; et al.	2017-04-27
Integrated circuit heat dissipation using nanostructures Grant 9,601,606 - Botula , et al. March 21, 2	2017-03-21
Silicon-on-insulator heat sink Grant 9,530,711 - Botula , et al. December 27, 2	2016-12-27
Integrated Circuit Heat Dissipation Using Nanostructures App 20160204048 - BOTULA; ALAN B. ; et al.	2016-07-14
Integrated Circuit Heat Dissipation Using Nanostructures App 20160204233 - BOTULA; ALAN B. ; et al.	2016-07-14
Integrated Circuit Heat Dissipation Using Nanostructures App 20160126158 - BOTULA; Alan B. ; et al.	2016-05-05
Integrated circuit heat dissipation using nanostructures Grant 9,324,628 - Botula , et al. April 26, 2	2016-04-26
SINGLE-CHIP FIELD EFFECT TRANSISTOR (FET) SWITCH WITH SILICON GERMANIUM (SiGe) POWER AMPLIFIER AND METHODS OF FORMING App 20150364492 - Cheng; Peng ; et al.	2015-12-17
Thin body switch transistor Grant 9,214,561 - Abou-Khalil , et al. December 15, 2	2015-12-15
High linearity SOI wafer for low-distortion circuit applications Grant 9,165,819 - Botula , et al. October 20, 2	2015-10-20
Silicon-on-insulator Heat Sink App 20150255363 - Botula; Alan B. ; et al.	2015-09-10
Integrated Circuit Heat Dissipation Using Nanostructures App 20150243578 - BOTULA; Alan B. ; et al.	2015-08-27
SINGLE-CHIP FIELD EFFECT TRANSISTOR (FET) SWITCH WITH SILICON GERMANIUM (SiGe) POWER AMPLIFIER AND METHODS OF FORMING App 20150194416 - Cheng; Peng ; et al.	2015-07-09
Scaling of bipolar transistors Grant 9,076,810 - Joseph , et al. July 7, 2	2015-07-07
Silicon-on-insulator heat sink Grant 9,059,269 - Botula , et al. June 16, 2	2015-06-16
High Linearity Soi Wafer For Low-distortion Circuit Applications App 20150072504 - Botula; Alan B. ; et al.	2015-03-12
High linearity SOI wafer for low-distortion circuit applications Grant 8,951,896 - Botula , et al. February 10, 2	2015-02-10
Scaling Of Bipolar Transistors App 20150024570 - Joseph; Alvin J. ; et al.	2015-01-22
Thin Body Switch Transistor App 20150001622 - Abou-Khalil; Michel J. ; et al.	2015-01-01
High Linearity Soi Wafer For Low-distortion Circuit Applications App 20150004778 - BOTULA; ALAN B. ; et al.	2015-01-01
SOI radio frequency switch with enhanced signal fidelity and electrical isolation Grant 8,916,467 - Botula , et al. December 23, 2	2014-12-23
Lateral extended drain metal oxide semiconductor field effect transistor (LEDMOSFET) having a high drain-to-body breakdown voltage (Vb), a method of forming an LEDMOSFET, and a silicon-controlled rectifier (SCR) incorporating a complementary pair of LEDMOSFETs Grant 8,901,676 - Abou-Khalil , et al. December 2, 2	2014-12-02
SOI radio frequency switch with enhanced electrical isolation Grant 8,866,226 - Botula , et al. October 21, 2	2014-10-21
Silicon-on-insulator Heat Sink App 20140191322 - BOTULA; Alan B. ; et al.	2014-07-10
Noble gas implantation region in top silicon layer of semiconductor-on-insulator substrate Grant 8,748,285 - Botula , et al. June 10, 2	2014-06-10
Silicon-on-insulator (SOI) structure configured for reduced harmonics and method of forming the structure Grant 8,709,903 - Botula , et al. April 29, 2	2014-04-29
Silicon-on-insulator (SOI) structure configured for reduced harmonics, design structure and method Grant 8,698,244 - Botula , et al. April 15, 2	2014-04-15
Silicon-on-insulator (soi) Structure Configured For Reduced Harmonics And Method Of Forming The Structure App 20140004687 - Botula; Alan B. ; et al.	2014-01-02
Silicon-on-insulator (SOI) structure configured for reduced harmonics and method of forming the structure Grant 8,564,067 - Botula , et al. October 22, 2	2013-10-22
Method, apparatus, and design structure for silicon-on-insulator high-bandwidth circuitry with reduced charge layer Grant 8,492,868 - Botula , et al. July 23, 2	2013-07-23
Semiconductor-on-insulator substrate and structure including multiple order radio frequency harmonic suppressing region Grant 8,492,294 - Greco , et al. July 23, 2	2013-07-23
Lateral extended drain metal oxide semiconductor field effect transistor (LEDMOSFET) with tapered dielectric plates to achieve a high drain-to-body breakdown voltage, a method of forming the transistor and a program storage device for designing the transistor Grant 8,482,067 - Abou-Khalil , et al. July 9, 2	2013-07-09
Silicon-on-insulator (soi) Structure Configured For Reduced Harmonics And Method Of Forming The Structure App 20130161618 - Botula; Alan B. ; et al.	2013-06-27
Silicon-on-insulator (SOI) structure configured for reduced harmonics and method of forming the structure Grant 8,471,340 - Botula , et al. June 25, 2	2013-06-25
Noble Gas Implantation Region In Top Silicon Layer Of Semiconductor-on-insulator Substrate App 20130134518 - Botula; Alan B. ; et al.	2013-05-30
Semiconductor-on-insulator Substrate And Structure Including Multiple Order Radio Frequency Harmonic Supressing Region App 20130005157 - Greco; Joseph R. ; et al.	2013-01-03
Lateral Extended Drain Metal Oxide Semiconductor Field Effect Transistor (ledmosfet) With Tapered Dielectric Plates To Achieve A High Drain-to-body Breakdown Voltage, A Method Of Forming The Transistor And A Program Storage Device For Designing The Transistor App 20130001589 - Abou-Khalil; Michel J. ; et al.	2013-01-03
Semiconductor-on-insulator substrate and structure including multiple order radio frequency harmonic supressing region Grant 8,299,537 - Greco , et al. October 30, 2	2012-10-30
Lateral extended drain metal oxide semiconductor field effect transistor (LEDMOSFET) with tapered dielectric plates Grant 8,299,547 - Abou-Khalil , et al. October 30, 2	2012-10-30
Lateral Extended Drain Metal Oxide Semiconductor Field Effect Transistor (ledmosfet) With Tapered Dielectric Plates To Achieve A High Drain-to-body Breakdown Voltage, A Method Of Forming The Transistor And A Program Storage Device For Designing The Transistor App 20120168766 - Abou-Khalil; Michel J. ; et al.	2012-07-05
LATERAL EXTENDED DRAIN METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR (LEDMOSFET) HAVING A HIGH DRAIN-TO-BODY BREAKDOWN VOLTAGE (Vb), A METHOD OF FORMING AN LEDMOSFET, AND A SILICON-CONTROLLED RECTIFIER (SCR) INCORPORATING A COMPLEMENTARY PAIR OF LEDMOSFETS App 20120168817 - Abou-Khalil; Michel J. ; et al.	2012-07-05
Soi Radio Frequency Switch With Enhanced Electrical Isolation App 20120104496 - Botula; Alan B. ; et al.	2012-05-03
SOI radio frequency switch with enhanced electrical isolation Grant 8,133,774 - Botula , et al. March 13, 2	2012-03-13
Method, Apparatus, And Design Structure For Silicon-on-insulator High-bandwidth Circuitry With Reduced Charge Layer App 20120025345 - BOTULA; ALAN B. ; et al.	2012-02-02
SOI radio frequency switch for reducing high frequency harmonics Grant 8,026,131 - Botula , et al. September 27, 2	2011-09-27
Soi Radio Frequency Switch With Enhanced Signal Fidelity And Electrical Isolation App 20110221510 - Botula; Alan B. ; et al.	2011-09-15
SOI radio frequency switch with enhanced signal fidelity and electrical isolation Grant 7,999,320 - Botula , et al. August 16, 2	2011-08-16
Silicon-on-insulator (soi) Structure Configured For Reduced Harmonics And Method Of Forming The Structure App 20110127529 - Botula; Alan B. ; et al.	2011-06-02
Silicon-on-insulator (soi) Structure Configured For Reduced Harmonics, Design Structure And Method App 20110131542 - Botula; Alan B. ; et al.	2011-06-02
System and method for detecting local mechanical stress in integreated devices Grant 7,944,550 - Bumm , et al. May 17, 2	2011-05-17
High resistivity SOI base wafer using thermally annealed substrate Grant 7,883,990 - Levy , et al. February 8, 2	2011-02-08
Optimized device isolation Grant 7,868,423 - Benoit , et al. January 11, 2	2011-01-11
Method for adjusting lithographic mask flatness using thermally induced pellicle stress Grant 7,826,038 - Gallagher , et al. November 2, 2	2010-11-02
Integrated circuit and methods of measurement and preparation of measurement structure Grant 7,812,347 - Banke, Jr. , et al. October 12, 2	2010-10-12
Soi Radio Frequency Switch With Enhanced Electrical Isolation App 20100244934 - Botula; Alan B. ; et al.	2010-09-30
Semiconductor-on-insulator Substrate And Structure Including Multiple Order Radio Ferquency Harmonic Supressing Region App 20100200927 - Greco; Joseph R. ; et al.	2010-08-12
Soi Radio Frequency Switch For Reducing High Frequency Harmonics App 20100156510 - Botula; Alan B. ; et al.	2010-06-24
Soi Radio Frequency Switch With Enhanced Signal Fidelity And Electrical Isolation App 20100156526 - Botula; Alan B. ; et al.	2010-06-24
Optimized Device Isolation App 20100117122 - Benoit; John J. ; et al.	2010-05-13
Sub-lithographic imaging techniques and processes Grant 7,585,614 - Furukawa , et al. September 8, 2	2009-09-08
System And Method For Detecting Local Mechanical Stress In Integreated Devices App 20090219508 - Bumm; Lloyd ; et al.	2009-09-03
High Resistivity Soi Base Wafer Using Thermally Annealed Substrate App 20090110898 - Levy; Max ; et al.	2009-04-30
Methods of measurement and preparation of measurement structure of integrated circuit Grant 7,507,591 - Banke, Jr. , et al. March 24, 2	2009-03-24
STI stress modification by nitrogen plasma treatment for improving performance in small width devices Grant 7,479,688 - Deshpande , et al. January 20, 2	2009-01-20
Structure And Method For Enhanced Triple Well Latchup Robustness App 20080265333 - Collins; David S. ; et al.	2008-10-30
Structure and method for enhanced triple well latchup robustness Grant 7,442,996 - Collins , et al. October 28, 2	2008-10-28
Integrated Circuit and Methods of Measurement And Preparation of Measurement Structure App 20080157077 - Banke; G. W. ; et al.	2008-07-03
Method For Adjusting Lithographic Mask Flatness Using Thermally Induced Pellicle Stress App 20080131795 - Gallagher; Emily F. ; et al.	2008-06-05
Method for adjusting lithographic mask flatness using thermally induced pellicle stress Grant 7,355,680 - Gallagher , et al. April 8, 2	2008-04-08
Device Modeling For Proximity Effects App 20080022237 - Adler; Eric ; et al.	2008-01-24
Device modeling for proximity effects Grant 7,302,376 - Adler , et al. November 27, 2	2007-11-27
Structure And Method For Enhanced Triple Well Latchup Robustness App 20070170515 - Collins; David S. ; et al.	2007-07-26
Integration Scheme For High Gain Fet In Standard Cmos Process App 20070099386 - Coolbaugh; Douglas D. ; et al.	2007-05-03
Canary Device For Failure Analysis App 20060195285 - Bouchard; Pierre J. ; et al.	2006-08-31
Canary device for failure analysis Grant 7,089,138 - Bouchard , et al. August 8, 2	2006-08-08
Method For Adjusting Lithographic Mask Flatness Using Thermally Induced Pellicle Stress App 20060146313 - Gallagher; Emily F. ; et al.	2006-07-06
Sub-lithographic Imaging Techniques And Processes App 20060060562 - Furukawa; Toshiharu ; et al.	2006-03-23
Integrated Circuit And Methods Of Measurement And Preparation Of Measurement Structure App 20050283335 - Banke, G. W. Jr. ; et al.	2005-12-22
CMOS device having retrograde n-well and p-well Grant 6,967,380 - Breitwisch , et al. November 22, 2	2005-11-22
Symmetric device with contacts self aligned to gate Grant 6,946,376 - Chediak , et al. September 20, 2	2005-09-20
Method and structure to reduce CMOS inter-well leakage Grant 6,946,710 - Logan , et al. September 20, 2	2005-09-20
STI stress modification by nitrogen plasma treatment for improving performance in small width devices Grant 6,887,798 - Deshpande , et al. May 3, 2	2005-05-03
Method Of Forming Gas Dielectric With Support Structure App 20050087875 - Furukawa, Toshiharu ; et al.	2005-04-28
Method of forming gas dielectric with support structure Grant 6,875,685 - Furukawa , et al. April 5, 2	2005-04-05
Sti Stress Modification By Nitrogen Plasma Treatment For Improving Performance In Small Width Devices App 20040242010 - Deshpande, Sadanand V. ; et al.	2004-12-02
STI stress modification by nitrogen plasma treatment for improving performance in small width devices App 20040238914 - Deshpande, Sadanand V. ; et al.	2004-12-02
DC or AC electric field assisted anneal Grant 6,822,311 - Ballantine , et al. November 23, 2	2004-11-23
Method and structure to reduce CMOS inter-well leakage App 20040166620 - Logan, Lyndon R. ; et al.	2004-08-26
CMOS device having retrograde n-well and p-well App 20040157418 - Breitwisch, Matthew J. ; et al.	2004-08-12
Device Modeling For Proximity Effects App 20040034517 - Adler, Eric ; et al.	2004-02-19
Method and structure to reduce CMOS inter-well leakage Grant 6,686,252 - Logan , et al. February 3, 2	2004-02-03
Method of forming retrograde n-well and p-well Grant 6,667,205 - Breitwisch , et al. December 23, 2	2003-12-23
In-line electrical monitor for measuring mechanical stress at the device level on a semiconductor wafer Grant 6,649,429 - Adams , et al. November 18, 2	2003-11-18
DC or AC electric field assisted anneal App 20030201515 - Ballantine, Arne W. ; et al.	2003-10-30
Method of forming retrograde n-well and p-well App 20030197227 - Breitwisch, Matthew J. ; et al.	2003-10-23
In-line electrical monitor for measuring mechanical stress at the device level on a semiconductor wafer App 20020190252 - Adams, Edward D. ; et al.	2002-12-19
Symmetric device with contacts self aligned to gate App 20020158286 - Chediak, Juan A. ; et al.	2002-10-31
Method and structure to reduce CMOS inter-well leakage App 20020135024 - Logan, Lyndon R. ; et al.	2002-09-26
In-line electrical monitor for measuring mechanical stress at the device level on a semiconductor wafer Grant 6,441,396 - Adams , et al. August 27, 2	2002-08-27
Method For Forming A Liner In A Trench App 20020106906 - Ballantine, Arne W. ; et al.	2002-08-08
In-situ ion implant activation and measurement apparatus Grant 6,417,515 - Barrett , et al. July 9, 2	2002-07-09
DC or AC electric field asssisted anneal App 20010026999 - Ballantir, Arne W. ; et al.	2001-10-04
Silicided silicon microtips for scanning probe microscopy Grant 6,198,300 - Doezema , et al. March 6, 2	2001-03-06
Scanning capacitance - voltage microscopy Grant 5,065,103 - Slinkman , et al. November 12, 1	1991-11-12