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Patent applications and USPTO patent grants for Siu; Stuart C..The latest application filed is for "streamlined cache coherency protocol system and method for a multiple processor single chip device".
Patent | Date |
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Streamlined cache coherency protocol system and method for a multiple processor single chip device Grant 6,918,012 - Venkitakrishnan , et al. July 12, 2 | 2005-07-12 |
Streamlined cache coherency protocol system and method for a multiple processor single chip device App 20030046495 - Venkitakrishnan, Padmanabha I. ;   et al. | 2003-03-06 |
Cache coherent split transaction memory bus architecture and protocol for a multi processor chip device App 20030023794 - Venkitakrishnan, Padmanabha I. ;   et al. | 2003-01-30 |
Chip multiprocessor with multiple operating systems App 20020184328 - Richardson, Stephen E. ;   et al. | 2002-12-05 |
Method and apparatus for sequencing and decoding variable length instructions with an instruction boundary marker within each instruction Grant 5,881,260 - Raje , et al. March 9, 1 | 1999-03-09 |
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