SINGH; Tarjinder
Patent Applications and Registrations
Patent applications and USPTO patent grants for SINGH; Tarjinder.The latest application filed is for "graph reordering and tiling techniques".
- SINGH; Tarjinder - Bangalore IN
| Patent | Date |
|---|---|
| Graph Reordering And Tiling Techniques App 20220156322 - SINGH; Tarjinder ; et al. | 2022-05-19 |
| Systolic array of pipelined processing engines for implementing dynamic programming algorithms Grant 11,003,620 - Patil , et al. May 11, 2 | 2021-05-11 |
| Systolic Array Of Pipelined Processing Engines For Implementing Dynamic Programming Algorithms App 20190197019 - Patil; Saurabh ; et al. | 2019-06-27 |
| Programmable address space built-in self test (BIST) device and method for fault detection Grant 7,945,823 - Doddamane , et al. May 17, 2 | 2011-05-17 |
| Programmable address space built-in self test (BIST) device and method for fault detection App 20070271482 - Doddamane; Ramesha ; et al. | 2007-11-22 |
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