Singh; Shanker

Patent Applications and Registrations

Patent applications and USPTO patent grants for Singh; Shanker.The latest application filed is for "method and apparatus for memory with embedded processor".

Company Profile

0.20.3

Singh; Shanker - Morgan Hill CA
Singh; Shanker - Tuscon AZ
Singh; Shanker - Fishkill NY
Singh; Shanker - Hyde Park NY
Singh; Shanker - Beacon NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method and apparatus for memory with embedded processor Grant 6,877,046 - Singh April 5, 2	2005-04-05
Method and system for detecting a hard failure in a memory array Grant 6,799,291 - Kilmer , et al. September 28, 2	2004-09-28
Fault tolerant memory system utilizing memory arrays with hard error detection Grant 6,785,837 - Kilmer , et al. August 31, 2	2004-08-31
High performance fault tolerant memory system utilizing greater than four-bit data word memory arrays Grant 6,732,291 - Kilmer , et al. May 4, 2	2004-05-04
Memory array system Grant 6,728,156 - Kilmer , et al. April 27, 2	2004-04-27
Method and apparatus for memory with embedded processor App 20030188086 - Singh, Shanker	2003-10-02
Memory array system App 20030169634 - Kilmer, Charles A. ; et al.	2003-09-11
System and method for efficiently storing compressed data on a hard disk drive Grant 6,449,689 - Corcoran , et al. September 10, 2	2002-09-10
Data caching with a partially compressed cache Grant 6,324,621 - Singh , et al. November 27, 2	2001-11-27
Data Caching With A Partially Compressed Cache App 20010001872 - SINGH, SHANKER ; et al.	2001-05-24
Method and apparatus for performing on-chip function checks and locating detected anomalies within a nested time interval using CRCs or the like Grant 6,105,155 - Cheng , et al. August 15, 2	2000-08-15
Method and apparatus for detecting and correcting anomalies in field-programmable gate arrays using CRCs for anomaly detection and parity for anomaly correction Grant 6,101,624 - Cheng , et al. August 8, 2	2000-08-08
Memory array based data reorganizer Grant 5,485,588 - Singh January 16, 1	1996-01-16
Fault mapping apparatus for memory Grant 5,233,614 - Singh August 3, 1	1993-08-03
Reconfigurable memory using both address permutation and spare memory elements Grant 4,584,682 - Shah , et al. April 22, 1	1986-04-22
Memory correction scheme using spare arrays Grant 4,584,681 - Singh , et al. April 22, 1	1986-04-22
Fault alignment control system and circuits Grant 4,534,029 - Singh , et al. August 6, 1	1985-08-06
Method of memory reconfiguration for fault tolerant memory Grant 4,485,471 - Singh , et al. November 27, 1	1984-11-27
Integrated binary-BCD look-ahead adder Grant 4,118,786 - Levine , et al. October 3, 1	1978-10-03
Partial Product Array Multiplier Grant 3,795,880 - Singh , et al. March 5, 1	1974-03-05
Test Pattern Generator Grant 3,781,829 - Singh December 25, 1	1973-12-25
Fast Adder For Multi-number Additions Grant 3,675,001 - Singh July 4, 1	1972-07-04
Method Of Testing Devices Using Untested Devices As A Reference Standard Grant 3,636,443 - Singh , et al. January 18, 1	1972-01-18

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