| Patent | Date |
|---|
Memory Device With Global And Local Latches
App 20220284949 - Katoch; Atul ; et al. | 2022-09-08 |
Static random access memory with write assist circuit
Grant 11,423,977 - Fujiwara , et al. August 23, 2 | 2022-08-23 |
Write assist for a memory device and methods of forming the same
Grant 11,423,978 - Singh , et al. August 23, 2 | 2022-08-23 |
Systems and Methods for Controlling Power Management Operations in a Memory Device
App 20220238144 - Jain; Sanjeev Kumar ; et al. | 2022-07-28 |
Memory device with global and local latches
Grant 11,361,818 - Katoch , et al. June 14, 2 | 2022-06-14 |
Systems and methods for controlling power management operations in a memory device
Grant 11,309,000 - Jain , et al. April 19, 2 | 2022-04-19 |
Systems And Methods For Controlling Power Management Operations In A Memory Device
App 20220068327 - Jain; Sanjeev Kumar ; et al. | 2022-03-03 |
Memory device with reduced-resistance interconnect
Grant 11,145,655 - Singh , et al. October 12, 2 | 2021-10-12 |
Semiconductor memory device using shared data line for read/write operation
Grant 11,120,868 - Chen , et al. September 14, 2 | 2021-09-14 |
Memory Array Circuit And Method Of Manufacturing Same
App 20210217742 - FUJIWARA; Hidehiro ; et al. | 2021-07-15 |
Write Assist for a Memory Device and Methods of Forming the Same
App 20210201991 - Singh; Sahil Preet ; et al. | 2021-07-01 |
Flying and twisted bit line architecture for dual-port static random-access memory (DP SRAM)
Grant 10,991,423 - Singh , et al. April 27, 2 | 2021-04-27 |
Write assist for a memory device and methods of forming the same
Grant 10,971,220 - Singh , et al. April 6, 2 | 2021-04-06 |
Memory Device With Global And Local Latches
App 20210098052 - Katoch; Atul ; et al. | 2021-04-01 |
Memory array circuit and method of manufacturing the same
Grant 10,964,683 - Fujiwara , et al. March 30, 2 | 2021-03-30 |
Static Random Access Memory with Write Assist Circuit
App 20200411084 - FUJIWARA; Hidehiro ; et al. | 2020-12-31 |
Memory read stability enhancement with short segmented bit line architecture
Grant 10,854,282 - Sinangil , et al. December 1, 2 | 2020-12-01 |
Variation tolerant read assist circuit for SRAM
Grant 10,832,765 - Fujiwara , et al. November 10, 2 | 2020-11-10 |
Flying and twisted bit line architecture for dual-port static random-access memory (DP SRAM)
Grant 10,790,015 - Singh , et al. September 29, 2 | 2020-09-29 |
Static random access memory with write assist circuit
Grant 10,734,066 - Fujiwara , et al. | 2020-08-04 |
Memory Device With Reduced-resistance Interconnect
App 20200144268 - Singh; Sahil Preet ; et al. | 2020-05-07 |
Write Assist for a Memory Device and Methods of Forming the Same
App 20200143875 - Singh; Sahil Preet ; et al. | 2020-05-07 |
Semiconductor Memory Device Using Shared Data Line for Read/Write Operation
App 20200111526 - Chen; Chien-Yuan ; et al. | 2020-04-09 |
Memory Read Stability Enhancement With Short Segmented Bit Line Architecture
App 20200075092 - Sinangil; Mahmut ; et al. | 2020-03-05 |
Flying And Twisted Bit Line Architecture For Dual-port Static Random-access Memory (dp Sram)
App 20200020392 - Singh; Sahil Preet ; et al. | 2020-01-16 |
Flying And Twisted Bit Line Architecture For Dual-port Static Random-access Memory (dp Sram)
App 20200020391 - Singh; Sahil Preet ; et al. | 2020-01-16 |
Memory device with reduced-resistance interconnect
Grant 10,535,658 - Singh , et al. Ja | 2020-01-14 |
Write assist for a memory device and methods of forming the same
Grant 10,529,415 - Singh , et al. J | 2020-01-07 |
Variation Tolerant Read Assist Circuit for SRAM
App 20200005858 - FUJIWARA; Hidehiro ; et al. | 2020-01-02 |
Memory read stability enhancement with short segmented bit line architecture
Grant 10,510,403 - Sinangil , et al. Dec | 2019-12-17 |
Semiconductor memory device using shared data line for read/write operation
Grant 10,510,401 - Chen , et al. Dec | 2019-12-17 |
Flying and twisted bit line architecture for dual-port static random-access memory (DP SRAM)
Grant 10,490,267 - Singh , et al. Nov | 2019-11-26 |
Write Assist for a Memory Device and Methods of Forming the Same
App 20190295632 - Singh; Sahil Preet ; et al. | 2019-09-26 |
Write assist for a memory device and methods of forming the same
Grant 10,319,435 - Singh , et al. | 2019-06-11 |
Memory Read Stability Enhancement With Short Segmented Bit Line Architecture
App 20190108874 - Sinangil; Mahmut ; et al. | 2019-04-11 |
Flying And Twisted Bit Line Architecture For Dual-port Static Random-access Memory (dp Sram)
App 20190108875 - Singh; Sahil Preet ; et al. | 2019-04-11 |
Memory Array Circuit And Method Of Manufacturing The Same
App 20190067264 - FUJIWARA; Hidehiro ; et al. | 2019-02-28 |
Write Assist for a Memory Device and Methods of Forming the Same
App 20190066774 - Singh; Sahil Preet ; et al. | 2019-02-28 |
Static Random Access Memory With Write Assist Circuit
App 20190035455 - FUJIWARA; Hidehiro ; et al. | 2019-01-31 |
Antenna Diode Circuit
App 20190035779 - SINGH; Sahil Preet ; et al. | 2019-01-31 |
Memory Device With Reduced-resistance Interconnect
App 20180366467 - Singh; Sahil Preet ; et al. | 2018-12-20 |
Flying and twisted bit line architecture for dual-port static random-access memory (DP SRAM)
Grant 10,157,666 - Singh , et al. Dec | 2018-12-18 |
Memory read stability enhancement with short segmented bit line architecture
Grant 10,153,038 - Sinangil , et al. Dec | 2018-12-11 |
Combined Read/Write Circuit for Semiconductor Memory Device
App 20180336944 - Chen; Chien-Yuan ; et al. | 2018-11-22 |
Memory device with reduced-resistance interconnect
Grant 10,134,737 - Singh , et al. November 20, 2 | 2018-11-20 |
Memory device with reduced-resistance interconnect
Grant 10,127,951 - Singh November 13, 2 | 2018-11-13 |
Generating a collapsed VDD using a write-assist column to decrease a write voltage
Grant 10,037,796 - Singh , et al. July 31, 2 | 2018-07-31 |
Memory Read Stability Enhancement With Short Segmented Bit Line Architecture
App 20180197601 - Sinangil; Mahmut ; et al. | 2018-07-12 |
Generating A Collapsed Vdd Using A Write-assist Column To Decrease A Write Voltage
App 20180151220 - SINGH; Sahil Preet ; et al. | 2018-05-31 |
Flying And Twisted Bit Line Architecture For Dual-port Static Random-access Memory (dp Sram)
App 20180137910 - Singh; Sahil Preet ; et al. | 2018-05-17 |
Flying and twisted bit line architecture for dual-port static random-access memory (DP SRAM)
Grant 9,928,899 - Singh , et al. March 27, 2 | 2018-03-27 |
Memory read stability enhancement with short segmented bit line architecture
Grant 9,922,700 - Sinangil , et al. March 20, 2 | 2018-03-20 |
Circuit with self-adjust pre-charged global data line
Grant 9,911,473 - Singh , et al. March 6, 2 | 2018-03-06 |
Memory Read Stability Enhancement With Short Segmented Bit Line Architecture
App 20170345485 - Sinangil; Mahmut ; et al. | 2017-11-30 |
Flying And Twisted Bit Line Architecture For Dual-port Static Random-access Memory (dp Sram)
App 20170186483 - Singh; Sahil Preet ; et al. | 2017-06-29 |
Memory Device With Reduced-resistance Interconnect
App 20170186750 - Singh; Sahil Preet ; et al. | 2017-06-29 |
Memory Device With Reduced-resistance Interconnect
App 20170133063 - Singh; Sahil Preet | 2017-05-11 |
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