Singh; Harmander

Patent Applications and Registrations

Patent applications and USPTO patent grants for Singh; Harmander.The latest application filed is for "current in-rush mitigation for power-up of embedded memories".

Company Profile

2.7.7

Singh; Harmander - Cedar Park TX
Singh; Harmander - Austin TX US

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Current in-rush mitigation for power-up of embedded memories Grant 10,353,447 - Singh , et al. July 16, 2	2019-07-16
Power and performance aware memory-controller voting mechanism Grant 10,331,195 - Vratonjic , et al.	2019-06-25
Current In-rush Mitigation For Power-up Of Embedded Memories App 20180253129 - Singh; Harmander ; et al.	2018-09-06
Power And Performance Aware Memory-controller Voting Mechanism App 20170351316 - Vratonjic; Milena ; et al.	2017-12-07
Voltage detector with high voltage protection Grant 9,541,583 - Singh , et al. January 10, 2	2017-01-10
System and method for dynamically adjusting memory rail voltage Grant 9,299,419 - Singh , et al. March 29, 2	2016-03-29
Voltage Detector With High Voltage Protection App 20140334049 - Singh; Harmander ; et al.	2014-11-13
Correction of delay-based metric measurements using delay circuits having differing metric sensitivities Grant 7,548,823 - Singh , et al. June 16, 2	2009-06-16
Calibration Of Multi-metric Sensitive Delay Measurement Circuits App 20090144006 - Singh; Harmander ; et al.	2009-06-04
Calibration of multi-metric sensitive delay measurement circuits Grant 7,542,862 - Singh , et al. June 2, 2	2009-06-02
Calibration of Multi-Metric Sensitive Delay Measurement Circuits App 20080288197 - Singh; Harmander ; et al.	2008-11-20
Correction of Delay-Based Metric Measurements Using Delay Circuits Having Differing Metric Sensitivities App 20080288196 - Singh; Harmander ; et al.	2008-11-20

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