Singh; Guneet
Patent Applications and Registrations
Patent applications and USPTO patent grants for Singh; Guneet.The latest application filed is for "programmable delay circuit for low power applications".
- Singh; Guneet - San Diego CA
- Singh; Guneet - Santa Clara CA US
- Singh; Guneet - San Jose CA US
| Patent | Date |
|---|---|
| Programmable Delay Circuit For Low Power Applications App 20160329884 - Sridhar; Shraddha ; et al. | 2016-11-10 |
| Programmable delay circuit for low power applications Grant 9,490,785 - Sridhar , et al. November 8, 2 | 2016-11-08 |
| Delay circuit Grant 9,397,646 - Singh , et al. July 19, 2 | 2016-07-19 |
| Delay Circuit App 20160079971 - Singh; Guneet ; et al. | 2016-03-17 |
| Current mode logic circuit with multiple frequency modes Grant 9,281,810 - Singh , et al. March 8, 2 | 2016-03-08 |
| Current Mode Logic Circuit With Multiple Frequency Modes App 20150333743 - Singh; Guneet ; et al. | 2015-11-19 |
| Power Detector Circuit App 20150177289 - Haider; Nazar ; et al. | 2015-06-25 |
| Methods and systems for flexible and repeatable pre-route generation Grant 8,627,255 - Vedantam , et al. January 7, 2 | 2014-01-07 |
| Methods And Systems For Flexible And Repeatable Pre-route Generation App 20120110537 - Vedantam; Kiran ; et al. | 2012-05-03 |
| Jitter Attenuating Delay Locked Loop (dll) Using A Regenerative Delay Line App 20090322389 - Singh; Guneet ; et al. | 2009-12-31 |
| Multi-pole Delay Element Delay Locked Loop (dll) App 20090243672 - Singh; Guneet ; et al. | 2009-10-01 |
| Phase interpolation for phase-locked loops App 20070153951 - Lim; Chee How ; et al. | 2007-07-05 |
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