Singh; Akshay N.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Singh; Akshay N..The latest application filed is for "high density pillar interconnect conversion with stack to substrate connection".

Company Profile

7.7.10

Singh; Akshay N. - Boise ID

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
High Density Pillar Interconnect Conversion With Stack To Substrate Connection App 20210351163 - Fay; Owen R. ; et al.	2021-11-11
Semiconductor device assemblies including multiple shingled stacks of semiconductor dies Grant 11,094,670 - Ng , et al. August 17, 2	2021-08-17
High density pillar interconnect conversion with stack to substrate connection Grant 11,088,114 - Fay , et al. August 10, 2	2021-08-10
High Density Pillar Interconnect Conversion With Stack To Substrate Connection App 20210225771 - Fay; Owen R. ; et al.	2021-07-22
Semiconductor Device Assembly with Pillar Array App 20210183662 - Fay; Owen R. ; et al.	2021-06-17
High Density Pillar Interconnect Conversion With Stack To Substrate Connection App 20210134725 - Fay; Owen R. ; et al.	2021-05-06
High Density Pillar Interconnect Conversion With Stack To Substrate Connection App 20210134759 - Fay; Owen R. ; et al.	2021-05-06
High density pillar interconnect conversion with stack to substrate connection Grant 10,998,271 - Fay , et al. May 4, 2	2021-05-04
Semiconductor device assembly with pillar array and test ability Grant 10,943,794 - Fay , et al. March 9, 2	2021-03-09
Semiconductor Device Assemblies Including Multiple Shingled Stacks Of Semiconductor Dies App 20200020667 - Ng; Hong Wan ; et al.	2020-01-16
Semiconductor device assembly with pillar array Grant 10,529,592 - Fay , et al. J	2020-01-07
Semiconductor device assemblies including multiple shingled stacks of semiconductor dies Grant 10,522,507 - Ng , et al. Dec	2019-12-31
Semiconductor Device Assembly with Pillar Array App 20190341270 - Fay; Owen R. ; et al.	2019-11-07
Semiconductor Device Assemblies Including Multiple Shingled Stacks Of Semiconductor Dies App 20190244930 - Ng; Hong Wan ; et al.	2019-08-08
High Density, Tight Array Copper Pillar Interconnect Method and Package App 20190172725 - Fay; Owen R. ; et al.	2019-06-06
Semiconductor device assemblies including multiple shingled stacks of semiconductor dies Grant 10,312,219 - Ng , et al.	2019-06-04
Semiconductor Device Assemblies Including Multiple Shingled Stacks Of Semiconductor Dies App 20190139934 - Ng; Hong Wan ; et al.	2019-05-09

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