loadpatents
name:-0.023276090621948
name:-0.035571098327637
name:-0.001439094543457
Silberman; Joel Abraham Patent Filings

Silberman; Joel Abraham

Patent Applications and Registrations

Patent applications and USPTO patent grants for Silberman; Joel Abraham.The latest application filed is for "processor including age tracking of issue queue instructions".

Company Profile
0.31.17
  • Silberman; Joel Abraham - Somers NY US
  • Silberman; Joel Abraham - Somer NY
  • Silberman; Joel Abraham - Austin TX
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Processor including age tracking of issue queue instructions
Grant 8,489,863 - Bishop , et al. July 16, 2
2013-07-16
Processor including age tracking of issue queue instructions
Grant 8,380,964 - Bishop , et al. February 19, 2
2013-02-19
Processor Including Age Tracking of Issue Queue Instructions
App 20120260069 - Bishop; James Wilson ;   et al.
2012-10-11
Method of logic circuit synthesis and design using a dynamic circuit library
Grant 8,136,061 - Dhong , et al. March 13, 2
2012-03-13
Processor Including Age Tracking Of Issue Queue Instructions
App 20110185159 - Bishop; James Wilson ;   et al.
2011-07-28
Scan chain disable function for power saving
Grant 7,962,811 - Dhong , et al. June 14, 2
2011-06-14
Random carry-in for floating-point operations
Grant 7,493,357 - Dhong , et al. February 17, 2
2009-02-17
Method Of Logic Circuit Synthesis And Design Using A Dynamic Circuit Library
App 20080189670 - Dhong; Sang Hoo ;   et al.
2008-08-07
Method of logic circuit synthesis and design using a dynamic circuit library
Grant 7,363,609 - Dhong , et al. April 22, 2
2008-04-22
Wire trimmed programmable logic array
Grant 7,225,422 - Bucki , et al. May 29, 2
2007-05-29
Scan Chain Disable Function for Power Saving
App 20070061647 - Dhong; Sang Hoo ;   et al.
2007-03-15
Method and apparatus for row based power control of a microprocessor memory array
App 20070043895 - Adams; Chad Allen ;   et al.
2007-02-22
Scan chain disable function for power saving
Grant 7,165,006 - Dhong , et al. January 16, 2
2007-01-16
Scan chain disable function for power saving
App 20060095802 - Dhong; Sang Hoo ;   et al.
2006-05-04
Random access memory having an adaptable latency
Grant 6,961,276 - Atallah , et al. November 1, 2
2005-11-01
Apparatus and method for generating memory access signals, and memory accessed using said signals
Grant 6,944,088 - Asano , et al. September 13, 2
2005-09-13
Random carry-in for floating-point operations
Grant 6,941,335 - Dhong , et al. September 6, 2
2005-09-06
Low skew, power efficient local clock signal generation system
Grant 6,927,615 - Dhong , et al. August 9, 2
2005-08-09
Integrated logic and latch design with clock gating at static input signals
Grant 6,914,453 - Dhong , et al. July 5, 2
2005-07-05
Random access memory having an adaptable latency
App 20050063211 - Atallah, Francois Ibrahim ;   et al.
2005-03-24
Random carry-in for floating-point operations
App 20050055185 - Dhong, Sang Hoo ;   et al.
2005-03-10
Integrated logic and latch design with clock gating at static input signals
App 20050007152 - Dhong, Sang Hoo ;   et al.
2005-01-13
Wire trimmed programmable logic array
App 20040261048 - Bucki, Robert John ;   et al.
2004-12-23
Unified Local Clock Buffer Structures
App 20040246027 - Dhong, Sang Hoo ;   et al.
2004-12-09
Low skew, power efficient local clock signal generation system
App 20040246037 - Dhong, Sang Hoo ;   et al.
2004-12-09
Unified local clock buffer structures
Grant 6,825,695 - Dhong , et al. November 30, 2
2004-11-30
Apparatus for detecting multiple hits in a CAMRAM memory array
Grant 6,816,396 - Chai , et al. November 9, 2
2004-11-09
Apparatus For Detecting Multiple Hits In A Camram Memory Array
App 20040196700 - Chai, Chiaming ;   et al.
2004-10-07
Latching dynamic logic structure, and integrated circuit including same
Grant 6,744,282 - Dhong , et al. June 1, 2
2004-06-01
Apparatus and method for generating memory access signals, and memory accessed using said signals
App 20040064674 - Asano, Toru ;   et al.
2004-04-01
Method and apparatus for accelerating instruction fetching for a processor
Grant 6,604,191 - Flacks , et al. August 5, 2
2003-08-05
Method and apparatus for implementing microprocessor control logic using dynamic programmable logic arrays
Grant 6,600,959 - Coulman , et al. July 29, 2
2003-07-29
Method and system for accessing a cache memory within a data processing system
Grant 6,574,698 - Dhong , et al. June 3, 2
2003-06-03
Random carry-in for floating-point operations
App 20030101207 - Dhong, Sang Hoo ;   et al.
2003-05-29
Strobe circuit keeper arrangement providing reduced power consumption
Grant 6,535,041 - Bucki , et al. March 18, 2
2003-03-18
Method of logic circuit synthesis and design using a dynamic circuit library
App 20030023948 - Dhong, Sang Hoo ;   et al.
2003-01-30
Method And Apparatus For Synthesizing Levelized Logic
App 20020152450 - Dhong, Sang Hoo ;   et al.
2002-10-17
Processor and method of fetching an instruction that select one of a plurality of decoded fetch addresses generated in parallel to form a memory request
Grant 6,334,184 - Dhong , et al. December 25, 2
2001-12-25
Delayed matching signal generator and frequency multiplier using scaled delay networks
Grant 6,229,358 - Boerstler , et al. May 8, 2
2001-05-08
Domino logic circuit having a clocked precharge
Grant 6,104,213 - Dhong , et al. August 15, 2
2000-08-15
Method and apparatus for translating an effective address to a real address within a cache memory
Grant 6,088,763 - Silberman , et al. July 11, 2
2000-07-11
Multifunctional macro
Grant 6,065,028 - Dhong , et al. May 16, 2
2000-05-16
Method and apparatus for generating and logically combining less than (LT), greater than (GT), and equal to (EQ) condition code bits concurrently with the execution of an arithmetic or logical operation
Grant 6,035,390 - Burns , et al. March 7, 2
2000-03-07
Method for reducing power consumption in a set associative cache memory system
Grant 6,021,461 - Dhong , et al. February 1, 2
2000-02-01
High speed rotator with array method
Grant 5,771,268 - Aoki , et al. June 23, 1
1998-06-23
Combined adder and decoder digital circuit
Grant 5,710,731 - Ciraula , et al. January 20, 1
1998-01-20

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