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Patent applications and USPTO patent grants for Shone; Fu-Chia.The latest application filed is for "method for erasing flash memories and related system thereof".
Patent | Date |
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Memory structure and method of manufacturing a memory array Grant 7,439,133 - Chou , et al. October 21, 2 | 2008-10-21 |
Flash memory structure Grant 7,324,402 - Chen , et al. January 29, 2 | 2008-01-29 |
Method for erasing flash memories and related system thereof Grant 7,313,029 - Shen , et al. December 25, 2 | 2007-12-25 |
Method For Erasing Flash Memories And Related System Thereof App 20070242525 - Shen; Shin-Jang ;   et al. | 2007-10-18 |
Memory structure and method of manufacturing a memory array App 20070152260 - Chou; Ming-Hung ;   et al. | 2007-07-05 |
Common spacer dual gate memory cell and method for forming a nonvolatile memory array App 20050093057 - Shone, Fu-Chia | 2005-05-05 |
Triple well floating gate memory and operating method with isolated channel program, preprogram and erase processes Grant 5,998,826 - Hung , et al. December 7, 1 | 1999-12-07 |
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