Shoji; Teruo

Patent Applications and Registrations

Patent applications and USPTO patent grants for Shoji; Teruo.The latest application filed is for "fabrication method of semiconductor integrated circuit device".

Company Profile

0.5.6

Shoji; Teruo - Tokyo JP
Shoji; Teruo - Mitaka JP

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Manufacturing method of semiconductor integrated circuit device Grant 7,534,629 - Shoji , et al. May 19, 2	2009-05-19
Probe sheet adhesion holder, probe card, semiconductor test device, and manufacturing method of semiconductor device Grant 7,423,439 - Kasukabe , et al. September 9, 2	2008-09-09
Fabrication method of semiconductor integrated circuit device Grant 7,351,597 - Wada , et al. April 1, 2	2008-04-01
Fabrication Method Of Semiconductor Integrated Circuit Device App 20070218572 - Wada; Yuji ; et al.	2007-09-20
Fabrication Method Of Semiconductor Integrated Circuit Device App 20070207559 - Hasebe; Akio ; et al.	2007-09-06
Fabrication method of semiconductor integrated circuit device Grant 7,235,413 - Hasebe , et al. June 26, 2	2007-06-26
Fabrication method of semiconductor integrated circuit device Grant 7,219,422 - Wada , et al. May 22, 2	2007-05-22
Probe sheet adhesion holder, probe card, semiconductor test device, and manufacturing method of semiconductor device App 20070103178 - Kasukabe; Susumu ; et al.	2007-05-10
Manufacturing method of semiconductor integrated circuit device App 20060281222 - Shoji; Teruo ; et al.	2006-12-14
Fabrication method of semiconductor integrated circuit device App 20050095734 - Hasebe, Akio ; et al.	2005-05-05
Fabrication method of semiconductor integrated circuit device App 20040183556 - Wada, Yuji ; et al.	2004-09-23

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