Shivnaraine; Ravi
Patent Applications and Registrations
Patent applications and USPTO patent grants for Shivnaraine; Ravi.The latest application filed is for "back-gate biasing of clock trees using a reference generator".
- Shivnaraine; Ravi - Toronto CA
- Shivnaraine; Ravi - Brampton CA
| Patent | Date |
|---|---|
| Back-gate Biasing Of Clock Trees Using A Reference Generator App 20220158637 - Rousson; Alain ; et al. | 2022-05-19 |
| Matched Digital-to-analog Converters App 20220077872 - SHIVNARAINE; Ravi ; et al. | 2022-03-10 |
| Transmit phase detection circuit Grant 10,430,783 - Shivnaraine , et al. O | 2019-10-01 |
| Systems and methods for measuring temperature Grant 10,175,118 - Rezayee , et al. J | 2019-01-08 |
| Current-mode hysteresis comparator Grant 9,959,536 - Shivnaraine , et al. May 1, 2 | 2018-05-01 |
| AC coupled level shifting circuit Grant 9,941,884 - Rezayee , et al. April 10, 2 | 2018-04-10 |
| Transmit Phase Detection Circuit App 20180096341 - Shivnaraine; Ravi ; et al. | 2018-04-05 |
| Brown-out detector and power-on-reset circuit Grant 9,917,577 - Rezayee , et al. March 13, 2 | 2018-03-13 |
| Ac Coupled Level Shifting Circuit App 20180062656 - Rezayee; Afshin ; et al. | 2018-03-01 |
| Brown-out Detector And Power-on-reset Circuit App 20180062639 - Rezayee; Afshin ; et al. | 2018-03-01 |
| Anti-tamper circuit with internal local oscillator Grant 9,818,004 - Rezayee , et al. November 14, 2 | 2017-11-14 |
| Transition glitch suppression circuit Grant 9,692,417 - Rezayee , et al. June 27, 2 | 2017-06-27 |
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