Shishlov; Sergey Y.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Shishlov; Sergey Y..The latest application filed is for "apparatus and method for inter-strand communication".

Company Profile

1.7.14

Shishlov; Sergey Y. - Moscow RU

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Instruction and logic for sorting and retiring stores Grant 10,514,927 - Lechanka , et al. Dec	2019-12-24
Instruction and logic for identifying instructions for retirement in a multi-strand out-of-order processor Grant 10,133,582 - Kosarev , et al. November 20, 2	2018-11-20
Hardware apparatuses and methods to control access to a multiple bank data cache Grant 10,095,623 - Kluchnikov , et al. October 9, 2	2018-10-09
Apparatus And Method For Inter-strand Communication App 20180285119 - Titov; Alexandr ; et al.	2018-10-04
Method and Apparatus for Scheduling of Instructions in a Multi-Strand Out-Of-Order Processor App 20170235578 - Babayan; Boris A. ; et al.	2017-08-17
Increasing Processor Instruction Window Via Seperating Instructions According To Criticality App 20170161075 - TITOV; ALEXANDR ; et al.	2017-06-08
Select logic for the instruction scheduler of a multi strand out-of-order processor based on delayed reconstructed program order Grant 9,632,790 - Iyer , et al. April 25, 2	2017-04-25
Hardware Apparatuses And Methods To Control Access To A Multiple Bank Data Cache App 20170039139 - KLUCHNIKOV; ANDREY ; et al.	2017-02-09
Method and apparatus for scheduling instructions in a multi-strand out of order processor with instruction synchronization bits and scoreboard bits Grant 9,529,596 - Babayan , et al. December 27, 2	2016-12-27
Instruction and Logic for Sorting and Retiring Stores App 20160364239 - Lechenko; Anton ; et al.	2016-12-15
Processor Logic And Method For Dispatching Instructions From Multiple Strands App 20160364237 - Kosarev; Nikolay ; et al.	2016-12-15
Instruction And Logic For Identifying Instructions For Retirement In A Multi-strand Out-of-order Processor App 20160314000 - Kosarev; Nikolay ; et al.	2016-10-27
Instruction And Logic For Memory Access In A Clustered Wide-execution Machine App 20160306742 - LECHENKO; Anton W. ; et al.	2016-10-20
Hardware apparatuses and methods to control access to a multiple bank data cache Grant 9,471,501 - Kluchnikov , et al. October 18, 2	2016-10-18
Hardware Apparatuses And Methods To Control Access To A Multiple Bank Data Cache App 20160092367 - Kluchnikov; Andrey ; et al.	2016-03-31
Select Logic For The Instruction Scheduler Of A Multi Strand Out-of-order Processor Based On Delayed Reconstructed Program Order App 20150301831 - Iyer; Jayesh ; et al.	2015-10-22
Instruction Scheduling For A Multi-strand Out-of-order Processor App 20140208074 - Babayan; Boris A. ; et al.	2014-07-24
Method And Apparatus For Scheduling Of Instructions In A Multi-strand Out-of-order Processor App 20130007415 - Babayan; Boris A. ; et al.	2013-01-03

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