| Patent | Date |
|---|
Preparation of circuit designs for system-on-chip devices and implementation of circuitry using instances of a logical network-on-chip
Grant 10,977,401 - Arnold , et al. April 13, 2 | 2021-04-13 |
Conversion of block model-based circuit designs into circuit implementations
Grant 10,846,449 - Suresh , et al. November 24, 2 | 2020-11-24 |
Hardware description language specification translator
Grant 10,489,541 - Patra , et al. Nov | 2019-11-26 |
Predictive circuit design for integrated circuits
Grant 9,881,117 - Patra , et al. January 30, 2 | 2018-01-30 |
Hardware acceleration device handoff for using programmable integrated circuits as hardware accelerators
Grant 9,864,828 - Puthana , et al. January 9, 2 | 2018-01-09 |
System and method for preparing partially reconfigurable circuit designs
Grant 9,183,339 - Shirazi , et al. November 10, 2 | 2015-11-10 |
Verification and debugging using heterogeneous simulation models
Grant 8,868,396 - Shirazi , et al. October 21, 2 | 2014-10-21 |
Simulation that transfers port values of a design block via a configuration block of a programmable device
Grant 8,812,289 - Chan , et al. August 19, 2 | 2014-08-19 |
Circuit design simulation
Grant 8,769,448 - Sundararajan , et al. July 1, 2 | 2014-07-01 |
System level circuit design
Grant 8,769,449 - Donlin , et al. July 1, 2 | 2014-07-01 |
Automatically documenting circuit designs
Grant 8,650,517 - Sundararajan , et al. February 11, 2 | 2014-02-11 |
Method of performing a simulation of a design under test and a circuit for enabling testing of a circuit design
Grant 8,620,638 - Chan , et al. December 31, 2 | 2013-12-31 |
Method and apparatus for providing program-based hardware co-simulation of a circuit design
Grant 8,600,722 - Chan , et al. December 3, 2 | 2013-12-03 |
Method and circuit for secure definition and integration of cores
Grant 8,417,965 - Sundararajan , et al. April 9, 2 | 2013-04-09 |
Common debugger method and system
Grant 8,402,442 - Chan , et al. March 19, 2 | 2013-03-19 |
Simulation and emulation of a circuit design
Grant 8,265,918 - Neema , et al. September 11, 2 | 2012-09-11 |
Managing programmable device configuration
Grant 8,224,638 - Shirazi , et al. July 17, 2 | 2012-07-17 |
Creating evaluation hardware using a high level modeling system
Grant 8,219,958 - Sundararajan , et al. July 10, 2 | 2012-07-10 |
Method of and system for implementing a circuit in a device having programmable logic
Grant 8,102,188 - Chan , et al. January 24, 2 | 2012-01-24 |
Automated rate realization for circuit designs within high level circuit implementation tools
Grant 8,015,537 - Sundararajan , et al. September 6, 2 | 2011-09-06 |
Variable clocking in hardware co-simulation
Grant 7,937,259 - Chan , et al. May 3, 2 | 2011-05-03 |
Method of simulating bidirectional signals in a modeling system
Grant 7,934,185 - Ballagh , et al. April 26, 2 | 2011-04-26 |
Systems and methods of co-simulation utilizing multiple PLDs in a boundary scan chain
Grant 7,747,423 - Shirazi , et al. June 29, 2 | 2010-06-29 |
Method of and system for implementing a circuit in a device having programmable logic
Grant 7,746,099 - Chan , et al. June 29, 2 | 2010-06-29 |
Fast hardware co-simulation reset using partial bitstreams
Grant 7,739,092 - Ballagh , et al. June 15, 2 | 2010-06-15 |
Command buffering for hardware co-simulation
Grant 7,707,019 - Ballagh , et al. April 27, 2 | 2010-04-27 |
Point-to-point ethernet hardware co-simulation interface
Grant 7,636,653 - Chan , et al. December 22, 2 | 2009-12-22 |
Parameterizable compact network processor for low-level communication with an integrated circuit
Grant 7,590,137 - Chan , et al. September 15, 2 | 2009-09-15 |
Shared memory interface in a programmable logic device using partial reconfiguration
Grant 7,546,572 - Ballagh , et al. June 9, 2 | 2009-06-09 |
Clock stabilization detection for hardware simulation
Grant 7,478,030 - Ballagh , et al. January 13, 2 | 2009-01-13 |
Hardware-based co-simulation on a PLD having an embedded processor
Grant 7,437,280 - Ballagh , et al. October 14, 2 | 2008-10-14 |
Embedding a co-simulated hardware object in an event-driven simulator
Grant 7,433,813 - Ballagh , et al. October 7, 2 | 2008-10-07 |
Wireless dynamic boundary-scan topologies for field
Grant 7,383,478 - Ballagh , et al. June 3, 2 | 2008-06-03 |
Vector transfer during co-simulation
Grant 7,376,544 - Dick , et al. May 20, 2 | 2008-05-20 |
Method of simulating bidirectional signals in a modeling system
Grant 7,363,600 - Ballagh , et al. April 22, 2 | 2008-04-22 |
Hardware co-simulation breakpoints in a high-level modeling system
Grant 7,346,481 - Ballagh , et al. March 18, 2 | 2008-03-18 |
Shared memory for co-simulation
Grant 7,346,482 - Ballagh , et al. March 18, 2 | 2008-03-18 |
Vector interface to shared memory in simulating a circuit design
Grant 7,343,572 - Stone , et al. March 11, 2 | 2008-03-11 |
Embedding a hardware object in an application system
Grant 7,284,225 - Ballagh , et al. October 16, 2 | 2007-10-16 |
HDL co-simulation in a high-level modeling system
Grant 7,203,632 - Milne , et al. April 10, 2 | 2007-04-10 |
Simulation of integrated circuitry within a high-level modeling system using hardware description language circuit descriptions
Grant 7,194,705 - Deepak , et al. March 20, 2 | 2007-03-20 |
Co-simulation via boundary scan interface
Grant 7,184,946 - Ballagh , et al. February 27, 2 | 2007-02-27 |
Method and system for modeling and automatically generating an electronic design from a system level environment
Grant 7,110,935 - Hwang , et al. September 19, 2 | 2006-09-19 |
Method and apparatus for hardware co-simulation clocking
Grant 7,085,976 - Shirazi , et al. August 1, 2 | 2006-08-01 |
Specification of the hierarchy, connectivity, and graphical representation of a circuit design
Grant 7,003,751 - Stroomer , et al. February 21, 2 | 2006-02-21 |
Co-simulation via boundary scan interface
App 20040260528 - Ballagh, Jonathan B. ; et al. | 2004-12-23 |
HDL Co-simulation in a high-level modeling system
App 20040181385 - Milne, Roger B. ; et al. | 2004-09-16 |
| 