Shiota; Ryoji
Patent Applications and Registrations
Patent applications and USPTO patent grants for Shiota; Ryoji.The latest application filed is for "semiconductor integrated circuit and memory checking method".
- Shiota; Ryoji - Kanagawa JP
- Shiota; Ryoji - Katano JA
| Patent | Date |
|---|---|
| Semiconductor integrated circuit and memory checking method Grant 7,782,689 - Yamaguchi , et al. August 24, 2 | 2010-08-24 |
| Semiconductor integrated circuit having a BIST circuit Grant 7,565,589 - Shiota July 21, 2 | 2009-07-21 |
| Semiconductor Integrated Circuit And Memory Checking Method App 20080253208 - Yamaguchi; Tokushi ; et al. | 2008-10-16 |
| Semiconductor integrated circuit Grant 7,358,715 - Shiota , et al. April 15, 2 | 2008-04-15 |
| Semiconductor integrated circuit App 20070250747 - Shiota; Ryoji | 2007-10-25 |
| Test circuit inserting method and apparatus for a semiconductor integrated circuit Grant 7,207,019 - Shiota April 17, 2 | 2007-04-17 |
| Semiconductor integrated circuit App 20070043995 - Shiota; Ryoji ; et al. | 2007-02-22 |
| Test circuit inserting method and apparatus for a semiconductor integrated circuit App 20050132254 - Shiota, Ryoji | 2005-06-16 |
| Power transmission in double-drum winch Grant 4,022,432 - Toyomura , et al. May 10, 1 | 1977-05-10 |
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