Shin; Jeonghee

Patent Applications and Registrations

Patent applications and USPTO patent grants for Shin; Jeonghee.The latest application filed is for "llvm-based system c compiler for architecture synthesis".

Company Profile

0.21.17

Shin; Jeonghee - Sunnyvale CA
Shin; Jeonghee - Millwood NY
Shin; Jeonghee - Los Angeles CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
LLVM-based system C compiler for architecture synthesis Grant 10,545,739 - Cho , et al. Ja	2020-01-28
In-cycle resource sharing for high-level synthesis of microprocessors Grant 9,858,373 - Cho , et al. January 2, 2	2018-01-02
LLVM-Based System C Compiler for Architecture Synthesis App 20170286079 - Cho; Minsik ; et al.	2017-10-05
Automating a microarchitecture design exploration environment Grant 9,665,674 - Cho , et al. May 30, 2	2017-05-30
In-cycle Resource Sharing For High-level Synthesis Of Microprocessors App 20170017747 - Cho; Minsik ; et al.	2017-01-19
Automating a Microarchitecture Design Exploration Environment App 20160350464 - Cho; Minsik ; et al.	2016-12-01
Automating a microarchitecture design exploration environment Grant 9,507,891 - Cho , et al. November 29, 2	2016-11-29
Managing interconnect electromigration effects Grant 9,477,568 - Allen-Ware , et al. October 25, 2	2016-10-25
Automating a microarchitecture design exploration environment Grant 9,405,866 - Cho , et al. August 2, 2	2016-08-02
Managing Interconnect Electromigration Effects App 20150094995 - Allen-Ware; Malcolm S. ; et al.	2015-04-02
Adaptive workload based optimizations coupled with a heterogeneous current-aware baseline design to mitigate current delivery limitations in integrated circuits Grant 8,914,764 - Bose , et al. December 16, 2	2014-12-16
Current-aware floorplanning to overcome current delivery limitations in integrated circuits Grant 8,863,068 - Bose , et al. October 14, 2	2014-10-14
Token-based current control to mitigate current delivery limitations in integrated circuits Grant 8,826,216 - Bose , et al. September 2, 2	2014-09-02
Automating current-aware integrated circuit and package design and optimization Grant 8,826,203 - Darringer , et al. September 2, 2	2014-09-02
Adaptive Workload Based Optimizations Coupled With A Heterogeneous Current-aware Baseline Design To Mitigate Current Delivery Limitations In Integrated Circuits App 20140195996 - Bose; Pradip ; et al.	2014-07-10
Adaptive workload based optimizations to mitigate current delivery limitations in integrated circuits Grant 8,683,418 - Bose , et al. March 25, 2	2014-03-25
Current-aware Floorplanning To Overcome Current Delivery Limitations In Integrated Circuits App 20140082580 - Bose; Pradip ; et al.	2014-03-20
Token-Based Current Control to Mitigate Current Delivery Limitations in Integrated Circuits App 20140082574 - Bose; Pradip ; et al.	2014-03-20
Adaptive Workload Based Optimizations To Mitigate Current Delivery Limitations In Integrated Circuits App 20130339762 - Bose; Pradip ; et al.	2013-12-19
Automating Current-aware Integrated Circuit And Package Design And Optimization App 20130339917 - Darringer; John ; et al.	2013-12-19
Dynamic Redundancy For Microprocessor Components And Circuits Placed In Nonoperational Modes App 20090177919 - Bose; Pradip ; et al.	2009-07-09
Method For Implementing Dynamic Lifetime Reliability Extension For Microprocessor Architectures App 20090178051 - Zyuban; Victor ; et al.	2009-07-09
Method for extending lifetime reliability of digital logic devices through removal of aging mechanisms Grant 7,489,161 - Bose , et al. February 10, 2	2009-02-10
Method for extending lifetime reliability of digital logic devices through reversal of aging mechanisms Grant 7,486,107 - Bose , et al. February 3, 2	2009-02-03
Predicting Microprocessor Lifetime Reliability Using Architecture-level Structure-aware Techniques App 20090013207 - Bose; Pradip ; et al.	2009-01-08
Method of predicting microprocessor lifetime reliability using architecture-level structure-aware techniques Grant 7,472,038 - Bose , et al. December 30, 2	2008-12-30
Method And System Of Predicting Microprocessor Lifetime App 20080256383 - Bose; Pradip ; et al.	2008-10-16
Method and apparatus for extending lifetime reliability of digital logic devices through removal of aging mechanisms Grant 7,391,233 - Bose , et al. June 24, 2	2008-06-24
Method and apparatus for extending lifetime reliability of digital logic devices through reversal of aging mechanisms Grant 7,391,232 - Bose , et al. June 24, 2	2008-06-24
System and method for implementing dynamic lifetime reliability extension for microprocessor architectures Grant 7,386,851 - Zyuban , et al. June 10, 2	2008-06-10

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