Shin; HanGil

Patent Applications and Registrations

Patent applications and USPTO patent grants for Shin; HanGil.The latest application filed is for "semiconductor device and method of forming 3d dual side die embedded build-up semiconductor package".

Company Profile

1.81.63

Shin; HanGil - Seoul KR
Shin; HanGil - Gyeonggi-do KR
Shin; HanGil - Seongnam-si N/A KR
Shin; HanGil - Ichon-si KR

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Semiconductor device and method of using leadframe bodies to form openings through encapsulant for vertical interconnect of semiconductor die Grant 10,903,183 - Chi , et al. January 26, 2	2021-01-26
Semiconductor device and method of forming 3D dual side die embedded build-up semiconductor package Grant 10,510,703 - Chi , et al. Dec	2019-12-17
Semiconductor device and method of forming interposer frame electrically connected to embedded semiconductor die Grant 9,966,335 - Cho , et al. May 8, 2	2018-05-08
Methods of forming conductive and insulating layers Grant 9,865,575 - Chi , et al. January 9, 2	2018-01-09
Semiconductor device and method of forming vertical interconnect in FO-WLCSP using leadframe disposed between semiconductor die Grant 9,842,808 - Shin , et al. December 12, 2	2017-12-12
Semiconductor Device and Method of Forming 3D Dual Side Die Embedded Build-Up Semiconductor Package App 20170250154 - Chi; HeeJo ; et al.	2017-08-31
Integrated circuit packaging system with joint assembly and method of manufacture thereof Grant 9,748,157 - Chi , et al. August 29, 2	2017-08-29
Semiconductor device and method of forming 3D dual side die embedded build-up semiconductor package Grant 9,691,707 - Chi , et al. June 27, 2	2017-06-27
Semiconductor device with thin profile WLCSP with vertical interconnect over package footprint Grant 9,558,965 - Chi , et al. January 31, 2	2017-01-31
Methods of forming conductive jumper traces Grant 9,508,635 - Shin , et al. November 29, 2	2016-11-29
Carrier system with multi-tier conductive posts and method of manufacture thereof Grant 9,496,152 - Cho , et al. November 15, 2	2016-11-15
Methods of Forming Conductive and Insulating Layers App 20160329310 - Chi; HeeJo ; et al.	2016-11-10
Semiconductor Device and Method of Forming 3D Dual Side Die Embedded Build-Up Semiconductor Package App 20160233168 - Chi; HeeJo ; et al.	2016-08-11
Methods of forming conductive and insulating layers Grant 9,406,533 - Chi , et al. August 2, 2	2016-08-02
Semiconductor device and method of forming pre-molded semiconductor die having bumps embedded in encapsulant Grant 9,397,050 - Shin , et al. July 19, 2	2016-07-19
Semiconductor device and method of forming 3D dual side die embedded build-up semiconductor package Grant 9,362,161 - Chi , et al. June 7, 2	2016-06-07
Integrated circuit package stacking system with shielding and method of manufacture thereof Grant 9,355,939 - Cho , et al. May 31, 2	2016-05-31
Semiconductor device and method of forming leadframe with conductive bodies for vertical electrical interconnect of semiconductor die Grant 9,312,218 - Choi , et al. April 12, 2	2016-04-12
Integrated circuit packaging system with single metal layer interposer and method of manufacture thereof Grant 9,299,650 - Chi , et al. March 29, 2	2016-03-29
Semiconductor device with thin profile WLCSP with vertical interconnect over package footprint Grant 9,269,595 - Chi , et al. February 23, 2	2016-02-23
Semiconductor device and method of making an embedded wafer level ball grid array (EWLB) package on package (POP) device with a slotted metal carrier interposer Grant 9,269,691 - Chi , et al. February 23, 2	2016-02-23
Semiconductor device and method of forming open cavity in TSV interposer to contain semiconductor die in WLCSMP Grant 9,263,332 - Chi , et al. February 16, 2	2016-02-16
Integrated circuit packaging system with package-on-package and method of manufacture thereof Grant 9,230,898 - Shin , et al. January 5, 2	2016-01-05
Semiconductor Device and Method of Forming 3D Dual Side Die Embedded Build-Up Semiconductor Package App 20150270237 - Chi; HeeJo ; et al.	2015-09-24
Semiconductor device and method of forming conductive posts and heat sink over semiconductor die using leadframe Grant 9,064,859 - Chi , et al. June 23, 2	2015-06-23
Semiconductor device and method of forming open cavity in TSV interposer to contain semiconductor die in WLCSMP Grant 9,048,306 - Chi , et al. June 2, 2	2015-06-02
Semiconductor Device and Method of Forming Interposer Frame Electrically Connected to Embedded Semiconductor Die App 20150123273 - Cho; NamJu ; et al.	2015-05-07
Semiconductor Device and Method of Making an Embedded Wafer Level Ball Grid Array (EWLB) Package on Package (POP) Device With a Slotted Metal Carrier Interposer App 20150091157 - Chi; HeeJo ; et al.	2015-04-02
Methods of forming solder balls in semiconductor packages Grant 8,951,834 - Kim , et al. February 10, 2	2015-02-10
Semiconductor device and method of forming interposer frame electrically connected to embedded semiconductor die Grant 8,932,907 - Cho , et al. January 13, 2	2015-01-13
Methods of Forming Conductive and Insulating Layers App 20150004756 - Chi; HeeJo ; et al.	2015-01-01
Methods of Forming Conductive Materials on Contact Pads App 20150004750 - Chi; HeeJo ; et al.	2015-01-01
Methods of Forming Conductive Jumper Traces App 20150004748 - Shin; HanGil ; et al.	2015-01-01
Semiconductor Device and Method of Making an Embedded Wafer Level Ball Grid Array (EWLB) Package on Package (POP) Device With a Slotted Metal Carrier Interposer App 20140367848 - Chi; HeeJo ; et al.	2014-12-18
Semiconductor Device and Method of Using Leadframe Bodies to Form Openings Through Encapsulant for Vertical Interconnect of Semiconductor Die App 20140361423 - Chi; HeeJo ; et al.	2014-12-11
Semiconductor device and method of forming conductive layer over metal substrate for electrical interconnect of semiconductor die Grant 8,901,755 - Chi , et al. December 2, 2	2014-12-02
Integrated circuit packaging system with package-on-package and method of manufacture thereof Grant 8,749,040 - Chi , et al. June 10, 2	2014-06-10
Integrated circuit packaging system with through silicon via and method of manufacture thereof Grant 8,723,309 - Shin , et al. May 13, 2	2014-05-13
Integrated circuit packaging system with encapsulation and method of manufacture thereof Grant 8,716,065 - Chi , et al. May 6, 2	2014-05-06
Integrated Circuit Packaging System With Through Silicon Via And Method Of Manufacture Thereof App 20130334697 - Shin; HanGil ; et al.	2013-12-19
Semiconductor Device and Method of Forming Open Cavity in TSV Interposer to Contain Semiconductor Die in WLCSMP App 20130299974 - Chi; HeeJo ; et al.	2013-11-14
Integrated circuit packaging system with embedded thermal heat shield and method of manufacture thereof Grant 8,564,125 - Cho , et al. October 22, 2	2013-10-22
Integrated circuit packaging system with interposer interconnections and method of manufacture thereof Grant 8,558,366 - Choi , et al. October 15, 2	2013-10-15
Semiconductor Device and Method of Forming Conductive Layer Over Metal Substrate for Electrical Interconnect of Semiconductor Die App 20130249104 - Chi; HeeJo ; et al.	2013-09-26
Integrated circuit package system with package stacking and method of manufacture thereof Grant 8,541,872 - Cho , et al. September 24, 2	2013-09-24
Integrated circuit packaging system with stiffener and method of manufacture thereof Grant 8,492,888 - Chi , et al. July 23, 2	2013-07-23
Integrated circuit packaging system with intra substrate die and method of manufacture thereof Grant 8,476,111 - Cho , et al. July 2, 2	2013-07-02
Integrated circuit packaging system with post and method of manufacture thereof Grant 8,460,968 - Park , et al. June 11, 2	2013-06-11
Semiconductor Device and Method of Forming Conductive Posts and Heat Sink Over Semiconductor Die Using Leadframe App 20130105970 - Chi; HeeJo ; et al.	2013-05-02
Semiconductor Device and Method of Forming Interposer Frame Electrically Connected to Embedded Semiconductor Die App 20130099378 - Cho; NamJu ; et al.	2013-04-25
Integrated circuit packaging system with foldable substrate and method of manufacture thereof Grant 8,421,203 - Chi , et al. April 16, 2	2013-04-16
Integrated circuit packaging system with an interposer substrate and method of manufacture thereof Grant 8,409,917 - Yoon , et al. April 2, 2	2013-04-02
Integrated Circuit Packaging System With Encapsulation And Method Of Manufacture Thereof App 20130075927 - Chi; HeeJo ; et al.	2013-03-28
Integrated Circuit Packaging System With Embedded Thermal Heat Shield And Method Of Manufacture Thereof App 20130056864 - Cho; NamJu ; et al.	2013-03-07
Integrated Circuit Packaging System With Stiffener And Method Of Manufacture Thereof App 20130056863 - Chi; HeeJo ; et al.	2013-03-07
Integrated circuit packaging system with package stacking and method of manufacture thereof Grant 8,389,329 - Cho , et al. March 5, 2	2013-03-05
Integrated circuit packaging system with stacking interconnect and method of manufacture thereof Grant 8,390,108 - Cho , et al. March 5, 2	2013-03-05
Semiconductor device and method of forming interposer frame electrically connected to embedded semiconductor die Grant 8,384,227 - Cho , et al. February 26, 2	2013-02-26
Semiconductor Device and Method of Forming Vertical Interconnect in FO-WLCSP Using Leadframe Disposed Between Semiconductor Die App 20130026654 - Shin; HanGil ; et al.	2013-01-31
Semiconductor device and method of forming shielding layer after encapsulation and grounded through interconnect structure Grant 8,350,368 - Chi , et al. January 8, 2	2013-01-08
Semiconductor device and method of forming conductive posts and heat sink over semiconductor die using leadframe Grant 8,349,658 - Chi , et al. January 8, 2	2013-01-08
Semiconductor Device and Method of Using Leadframe Bodies to Form Openings Through Encapsulant for Vertical Interconnect of Semiconductor Die App 20130001762 - Chi; HeeJo ; et al.	2013-01-03
Integrated Circuit Packaging System With Pads And Method Of Manufacture Thereof App 20120319295 - Chi; HeeJo ; et al.	2012-12-20
Integrated Circuit Packaging System With Intra Substrate Die And Method Of Manufacture Thereof App 20120319263 - Cho; NamJu ; et al.	2012-12-20
Integrated Circuit Packaging System With Package Stacking And Method Of Manufacture Thereof App 20120306102 - Cho; NamJu ; et al.	2012-12-06
Method of manufacture of integrated circuit packaging system with multi-tier conductive interconnects Grant 8,318,539 - Cho , et al. November 27, 2	2012-11-27
Semiconductor device and method of forming vertical interconnect in FO-WLCSP using leadframe disposed between semiconductor die Grant 8,318,541 - Shin , et al. November 27, 2	2012-11-27
Semiconductor Device and Method of Forming Leadframe with Conductive Bodies for Vertical Electrical Interconnect of Semiconductor Die App 20120286407 - Choi; DaeSik ; et al.	2012-11-15
Semiconductor device and method of using leadframe bodies to form openings through encapsulant for vertical interconnect of semiconductor die Grant 8,288,209 - Chi , et al. October 16, 2	2012-10-16
Integrated Circuit Packaging System With An Interposer Substrate And Method Of Manufacture Thereof App 20120241925 - Yoon; In Sang ; et al.	2012-09-27
Integrated circuit packaging system with encapsulated via and method of manufacture thereof Grant 8,264,091 - Cho , et al. September 11, 2	2012-09-11
Integrated circuit package system with step mold recess Grant 8,247,894 - Yoon , et al. August 21, 2	2012-08-21
Semiconductor Device and Method of Forming Open Cavity in TSV Interposer to Contain Semiconductor Die in WLCSMP App 20120168916 - Chi; HeeJo ; et al.	2012-07-05
Semiconductor Device and Method of Forming Thin Profile WLCSP with Vertical Interconnect over Package Footprint App 20120153467 - Chi; HeeJo ; et al.	2012-06-21
Semiconductor Device and Method of Forming Thin Profile WLCSP with Vertical Interconnect over Package Footprint App 20120153505 - Chi; HeeJo ; et al.	2012-06-21
Integrated circuit system with recessed through silicon via pads and method of manufacture thereof Grant 8,202,797 - Chi , et al. June 19, 2	2012-06-19
Semiconductor Device and Method of Forming Interposer Frame Electrically Connected to Embedded Semiconductor Die App 20120119388 - Cho; NamJu ; et al.	2012-05-17
Integrated Circuit Packaging System With Flexible Substrate And Method Of Manufacture Thereof App 20120119393 - Chi; HeeJo ; et al.	2012-05-17
Integrated Circuit Packaging System With Interposer Interconnections And Method Of Manufacture Thereof App 20120086115 - Choi; A Leam ; et al.	2012-04-12
Semiconductor device and method of forming open cavity in TSV interposer to contain semiconductor die in WLCSMP Grant 8,143,097 - Chi , et al. March 27, 2	2012-03-27
Integrated Circuit Packaging System With Post And Method Of Manufacture Thereof App 20120068332 - Park; DongSam ; et al.	2012-03-22
Method of forming thin profile WLCSP with vertical interconnect over package footprint Grant 8,138,014 - Chi , et al. March 20, 2	2012-03-20
Semiconductor Device and Method of Forming Vertical Interconnect in FO-WLCSP Using Leadframe Disposed Between Semiconductor Die App 20120038034 - Shin; HanGil ; et al.	2012-02-16
Integrated circuit packaging system with a dual board-on-chip structure and method of manufacture thereof Grant 8,106,498 - Shin , et al. January 31, 2	2012-01-31
Integrated Circuit System With Recessed Through Silicon Via Pads And Method Of Manufacture Thereof App 20110309492 - Chi; HeeJo ; et al.	2011-12-22
Integrated circuit packaging system with interposer interconnections and method of manufacture thereof Grant 8,080,446 - Choi , et al. December 20, 2	2011-12-20
Integrated Circuit Package System With Package Stacking And Method Of Manufacture Thereof App 20110298119 - Cho; NamJu ; et al.	2011-12-08
Semiconductor Device and Method of Forming Shielding Layer After Encapsulation and Grounded Through Interconnect Structure App 20110298105 - Chi; HeeJo ; et al.	2011-12-08
Semiconductor Device and Method of Forming Conductive Posts and Heat Sink Over Semiconductor Die Using Leadframe App 20110291249 - Chi; HeeJo ; et al.	2011-12-01
Integrated circuit packaging system with stacked integrated circuit and heat spreader with openings and method of manufacture thereof Grant 8,039,316 - Chi , et al. October 18, 2	2011-10-18
Method Of Manufacture Of Integrated Circuit Packaging System With Multi-tier Conductive Interconnects App 20110223721 - Cho; NamJu ; et al.	2011-09-15
Carrier System With Multi-tier Conductive Posts And Method Of Manufacture Thereof App 20110220395 - Cho; NamJu ; et al.	2011-09-15
Semiconductor device and method of forming shielding layer after encapsulation and grounded through interconnect structure Grant 8,018,034 - Chi , et al. September 13, 2	2011-09-13
Integrated Circuit Packaging System With Encapsulation And Method Of Manufacture Thereof App 20110215450 - Chi; HeeJo ; et al.	2011-09-08
Integrated Circuit Package System With Package Stacking And Method Of Manufacture Thereof App 20110215448 - Cho; NamJu ; et al.	2011-09-08
Semiconductor Device and Method of Forming Thin Profile WLCSP with Vertical Interconnect over Package Footprint App 20110186977 - Chi; HeeJo ; et al.	2011-08-04
Integrated Circuit Packaging System With Stacking Interconnect And Method Of Manufacture Thereof App 20110140259 - Cho; NamJu ; et al.	2011-06-16
Integrated circuit packaging system with multi-tier conductive interconnects and method of manufacture thereof Grant 7,928,552 - Cho , et al. April 19, 2	2011-04-19
Integrated Circuit Packaging System With Package-on-package And Method Of Manufacture Thereof App 20110068464 - Chi; HeeJo ; et al.	2011-03-24
Integrated Circuit Packaging System With Encapsulated Via And Method Of Manufacture Thereof App 20110068453 - Cho; NamJu ; et al.	2011-03-24
Semiconductor Device and Method of Forming Open Cavity in TSV Interposer to Contain Semiconductor Die in WLCSMP App 20110068444 - Chi; HeeJo ; et al.	2011-03-24
Semiconductor Device and Method of Forming Pre-Molded Semiconductor Die Having Bumps Embedded in Encapsulant App 20110049695 - Shin; HanGil ; et al.	2011-03-03
Integrated Circuit Packaging System With Package-on-package And Method Of Manufacture Thereof App 20110037157 - Shin; HanGil ; et al.	2011-02-17
Integrated circuit packaging system with a tiered substrate package and method of manufacture thereof Grant 7,863,735 - Cho , et al. January 4, 2	2011-01-04
Integrated Circuit Packaging System With Interposer Interconnections And Method Of Manufacture Thereof App 20100301469 - Choi; A Leam ; et al.	2010-12-02
Semiconductor Device and Method of Forming Shielding Layer After Encapsulation and Grounded Through Interconnect Structure App 20100276792 - Chi; HeeJo ; et al.	2010-11-04
Integrated Circuit Packaging System With Stacked Integrated Circuit And Method Of Manufacture Thereof App 20100258928 - Chi; HeeJo ; et al.	2010-10-14
Integrated Circuit Packaging System With An Integral-interposer-structure And Method Of Manufacture Thereof App 20100244223 - Cho; NamJu ; et al.	2010-09-30
Mountable integrated circuit package system with stacking interposer Grant 7,800,212 - Yoon , et al. September 21, 2	2010-09-21
Integrated Circuit Packaging System With A Dual Board-on-chip Structure And Method Of Manufacture Thereof App 20100224975 - Shin; HanGil ; et al.	2010-09-09
Integrated Circuit Package System With Step Mold Recess App 20090236720 - Yoon; In Sang ; et al.	2009-09-24
Mountable Integrated Circuit Package System With Stacking Interposer App 20090166834 - Yoon; In Sang ; et al.	2009-07-02
Mountable Integrated Circuit Package System With Protrusion App 20090127715 - Shin; HanGil ; et al.	2009-05-21
Integrated Circuit Package System With Cavity Substrate App 20080315406 - Chung; Jae Han ; et al.	2008-12-25