loadpatents
Patent applications and USPTO patent grants for Shimogawa; Kenjyu.The latest application filed is for "semiconductor apparatus".
Patent | Date |
---|---|
Semiconductor apparatus configured to reduce data processing performance Grant 9,202,541 - Senou , et al. December 1, 2 | 2015-12-01 |
Semiconductor device Grant 8,552,793 - Shimogawa , et al. October 8, 2 | 2013-10-08 |
Semiconductor Apparatus App 20130058173 - SENOU; Shuuichi ;   et al. | 2013-03-07 |
Semiconductor Device App 20130033308 - Shimogawa; Kenjyu ;   et al. | 2013-02-07 |
Semiconductor device Grant 8,310,297 - Shimogawa , et al. November 13, 2 | 2012-11-13 |
Semiconductor integrated circuit Grant 8,054,705 - Shimogawa , et al. November 8, 2 | 2011-11-08 |
Semiconductor device App 20110199140 - Shimogawa; Kenjyu ;   et al. | 2011-08-18 |
Semiconductor integrated circuit device minimizing leakage current Grant 7,940,577 - Shimogawa , et al. May 10, 2 | 2011-05-10 |
Semiconductor integrated circuit Grant 7,885,130 - Shimogawa , et al. February 8, 2 | 2011-02-08 |
Semiconductor Integrated Circuit App 20100034040 - SHIMOGAWA; Kenjyu ;   et al. | 2010-02-11 |
Semiconductor integrated circuit App 20100034039 - Shimogawa; Kenjyu ;   et al. | 2010-02-11 |
Integrated circuit apparatus controlling source voltage of MOSFET based on temperature Grant 7,276,956 - Furuta , et al. October 2, 2 | 2007-10-02 |
Integrated circuit apparatus Grant 7,274,616 - Furuta , et al. September 25, 2 | 2007-09-25 |
Semiconductor integrated circuit device App 20070109700 - Shimogawa; Kenjyu ;   et al. | 2007-05-17 |
Integrated circuit apparatus App 20060164905 - Furuta; Hiroshi ;   et al. | 2006-07-27 |
Integrated circuit apparatus controlling source voltage of MOSFET based on temperature App 20050285662 - Furuta, Hiroshi ;   et al. | 2005-12-29 |
Design method for semiconductor circuit device, design method for semiconductor circuit, and semiconductor circuit device App 20050144576 - Furuta, Hiroshi ;   et al. | 2005-06-30 |
Semiconductor integrated circuit device having a control circuit for setting the test mode Grant 5,557,232 - Shimogawa September 17, 1 | 1996-09-17 |
Semiconductor memory device having signal receiving facility fabricated from bi-CMOS circuits Grant 5,202,823 - Shimogawa April 13, 1 | 1993-04-13 |
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