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Patent applications and USPTO patent grants for Shimizu; Tsuguo.The latest application filed is for "automatic logic designing method and system".
Patent | Date |
---|---|
Automatic logic designing method and system Grant 5,504,690 - Kageyama , et al. April 2, 1 | 1996-04-02 |
Logic synthesis method Grant 5,287,289 - Kageyama , et al. February 15, 1 | 1994-02-15 |
Automatic logic generation method for pipeline processor Grant 5,274,793 - Kuroda , et al. December 28, 1 | 1993-12-28 |
Automatic logic design system Grant 4,833,619 - Shimizu , et al. May 23, 1 | 1989-05-23 |
Data processing system Grant 4,739,470 - Wada , et al. April 19, 1 | 1988-04-19 |
Buffer storage including a swapping circuit Grant 4,608,671 - Shimizu , et al. August 26, 1 | 1986-08-26 |
Pipelined data processing system Grant 4,541,047 - Wada , et al. September 10, 1 | 1985-09-10 |
Digital data processor with two operation units Grant 4,532,589 - Shintani , et al. July 30, 1 | 1985-07-30 |
Data processing system having ring-like connected multiprocessors relative to key storage Grant 4,441,152 - Matsuura , et al. April 3, 1 | 1984-04-03 |
Multiprocessor system with apparatus for propagating cache buffer invalidation signals around a circular loop Grant 4,385,351 - Matsuura , et al. May 24, 1 | 1983-05-24 |
Multiprogrammed data processing system with improved interlock control Grant 4,214,304 - Shimizu , et al. July 22, 1 | 1980-07-22 |
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