| Patent | Date |
|---|
Semiconductor integrated circuit capable of testing with small scale circuit configuration
Grant 7,457,996 - Kobayashi , et al. November 25, 2 | 2008-11-25 |
Semiconductor integrated circuit capable of testing with small scale circuit configuration
App 20080288836 - Kobayashi; Soichi ; et al. | 2008-11-20 |
Semiconductor integrated circuit capable of testing with small scale circuit configuration
App 20040184328 - Kobayashi, Soichi ; et al. | 2004-09-23 |
Semiconductor device comprising CPU and peripheral circuit wherein control unit performs wait cycle control that makes peripheral circuit wait a predetermined time before responding to CPU
Grant 6,748,464 - Mori , et al. June 8, 2 | 2004-06-08 |
Bus control circuit effecting timing control using cycle registers for respective cycles holding signal levels corresponding to bus control signals that are output by arrangement of signal level
Grant 6,721,897 - Oizumi , et al. April 13, 2 | 2004-04-13 |
Data processing unit including central unit and peripheral unit driven by separate power supplies
Grant 6,711,692 - Maeda , et al. March 23, 2 | 2004-03-23 |
Semiconductor device and a computer product
App 20020035654 - Mori, Yasufumi ; et al. | 2002-03-21 |
Semiconductor Device Having A Library Of Standard Cells And Method Of Designing The Same
App 20010011734 - KANAMOTO, TOSHIKI ; et al. | 2001-08-09 |
Automatic placement and routing device
Grant 6,253,364 - Tanaka , et al. June 26, 2 | 2001-06-26 |
Digital delay circuit and digital PLL circuit with first and second delay units
Grant 5,969,553 - Kishi , et al. October 19, 1 | 1999-10-19 |
Clock generating circuit, PLL circuit, semiconductor device, and methods for designing and making the clock generating circuit
Grant 5,801,559 - Sawai , et al. September 1, 1 | 1998-09-01 |
Microcomputer
Grant 5,787,310 - Shimizu , et al. July 28, 1 | 1998-07-28 |
Microprocessor with reset execution from an arbitrary address
Grant 5,551,045 - Kawamoto , et al. August 27, 1 | 1996-08-27 |
Integrated circuit with reduced clock skew
Grant 5,497,109 - Honda , et al. March 5, 1 | 1996-03-05 |
Integrated circuit with reduced clock skew and divided power supply lines
Grant 5,376,842 - Honoa , et al. December 27, 1 | 1994-12-27 |
Integrated circuit with reduced clock skew
Grant 5,278,466 - Honoa , et al. January 11, 1 | 1994-01-11 |
Clock system implementing divided power supply wiring
Grant 5,122,693 - Honda , et al. June 16, 1 | 1992-06-16 |
Semiconductor integrated circuit with self-test function
Grant 5,051,997 - Sakashita , et al. September 24, 1 | 1991-09-24 |
Microprocessor with Harvard Architecture
Grant 5,034,887 - Yasui , et al. July 23, 1 | 1991-07-23 |
Programmable clock frequency divider
Grant 4,947,411 - Shiraishi , et al. August 7, 1 | 1990-08-07 |
Comparator circuit
Grant 4,903,005 - Sakashita , et al. February 20, 1 | 1990-02-20 |
Semiconductor integrated circuit
Grant 4,813,019 - Shimazu , et al. March 14, 1 | 1989-03-14 |
Semiconductor memory device having initialization transistor
Grant 4,777,623 - Shimazu , et al. October 11, 1 | 1988-10-11 |
Semiconductor intergrated circuit
Grant 4,706,157 - Shimazu November 10, 1 | 1987-11-10 |
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