Shimanouchi; Masashi

Patent Applications and Registrations

Patent applications and USPTO patent grants for Shimanouchi; Masashi.The latest application filed is for "systems and methods for supporting both pulse amplitude modulation and quadrature amplitude modulation".

Company Profile

7.27.15

Shimanouchi; Masashi - San Jose CA
SHIMANOUCHI; Masashi - US
Shimanouchi; Masashi - Sunnyvale CA
Shimanouchi; Masashi - Lyons FR

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Short link efficient interconnect circuitry Grant 11,356,303 - Wu , et al. June 7, 2	2022-06-07
Systems and Methods for Supporting Both Pulse Amplitude Modulation and Quadrature Amplitude Modulation App 20210328852 - Shimanouchi; Masashi ; et al.	2021-10-21
Decomposable forward error correction Grant 11,101,925 - Langhammer , et al. August 24, 2	2021-08-24
Short Link Efficient Interconnect Circuitry App 20210218603 - Wu; Hsinho ; et al.	2021-07-15
Short link efficient interconnect circuitry Grant 10,965,501 - Wu , et al. March 30, 2	2021-03-30
Techniques For Generating a PAM Eye Diagram in a Receiver App 20210006439 - Li; Peng ; et al.	2021-01-07
Short Link Efficient Interconnect Circuitry App 20200145260 - Wu; Hsinho ; et al.	2020-05-07
Short link efficient interconnect circuitry Grant 10,530,614 - Wu , et al. J	2020-01-07
PAM-n jitter/noise decomposition analysis Grant 10,476,716 - Li , et al. Nov	2019-11-12
Method and apparatus for processing data and performing crosstalk simulation Grant 10,331,827 - Shimanouchi , et al.	2019-06-25
Decomposable Forward Error Correction App 20190190653 - Langhammer; Martin ; et al.	2019-06-20
Short Link Efficient Interconnect Circuitry App 20190132160 - Wu; Hsinho ; et al.	2019-05-02
Pam-n Jitter/noise Decomposition Analysis App 20180316527 - Li; Mike Peng ; et al.	2018-11-01
PAM-n jitter/noise decomposition analysis Grant 10,020,967 - Li , et al. July 10, 2	2018-07-10
Communication link control using communication interface and programmable logic circuitry Grant 9,929,803 - Wu , et al. March 27, 2	2018-03-27
Methods for built-in self-measurement of jitter for link components Grant 9,596,160 - Li , et al. March 14, 2	2017-03-14
Simulation tool for high-speed communications links Grant 9,405,865 - Li , et al. August 2, 2	2016-08-02
Methods for joint optimization of link equalization Grant 9,237,044 - Wu , et al. January 12, 2	2016-01-12
On-die jitter generator Grant 9,222,972 - Ding , et al. December 29, 2	2015-12-29
Methods and apparatus for generating short length patterns that induce inter-symbol interference Grant 9,177,087 - Shimanouchi , et al. November 3, 2	2015-11-03
Methods and apparatus for accurate transmitter simulation for link optimization Grant 9,178,542 - Shimanouchi , et al. November 3, 2	2015-11-03
Multi-level amplitude signaling receiver Grant 8,750,406 - Pan , et al. June 10, 2	2014-06-10
Simulation Tool for High-Speed Communications Links App 20140107997 - Li; Peng ; et al.	2014-04-17
Simulation tool for high-speed communications links Grant 8,626,474 - Li , et al. January 7, 2	2014-01-07
Circuitry on an integrated circuit for performing or facilitating oscilloscope, jitter, and/or bit-error-rate tester operations Grant 8,504,882 - Li , et al. August 6, 2	2013-08-06
Multi-level Amplitude Signaling Receiver App 20130195155 - PAN; Mingde ; et al.	2013-08-01
Bit error rate checker receiving serial data signal from an eye viewer Grant 8,433,958 - Ding , et al. April 30, 2	2013-04-30
Circuitry On An Integrated Circuit For Performing Or Facilitating Oscilloscope, Jitter, And/or Bit-error-rate Tester Operations App 20120072784 - Li; Peng ; et al.	2012-03-22
Bit Error Rate Checker Receiving Serial Data Signal From An Eye Viewer App 20120072785 - Ding; Weiqi ; et al.	2012-03-22
Simulation Tool For High-speed Communications Links App 20110257953 - Li; Peng ; et al.	2011-10-20
Loadboard enhancements for automated test equipment Grant 7,615,990 - Shimanouchi November 10, 2	2009-11-10
Method and system for improved ATE timing calibration at a device under test Grant 7,120,840 - Shimanouchi October 10, 2	2006-10-10
Method and apparatus for high speed IC test interface Grant 6,859,902 - Dalal , et al. February 22, 2	2005-02-22
Signal paths providing multiple test configurations App 20030156545 - Shimanouchi, Masashi ; et al.	2003-08-21

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